A Study on Implementation of LV circuit analysis simulator for Reliability Evaluation

신뢰성 평가를 위한 LV 회로 분석시뮬레이터 구현에 관한 연구

This study is concerned with analysis and reliability evaluation of LV circuit in Cab Cubicle system which controls train to keep safety in High Speed Train. LV circuit is operated with diagnosis system as safety system. In this paper, we suggest a design and an implementation method to analyze LV circuit or trace fault area in LV circuit. This simulator uses 28 package modules and examines input and output by equations. So, user can trace where is fault area. The implemented system can be expected to be useful for long term test and evaluation of circuit in high speed train systems. We expect reduction to diagnosis area or repair time by this simulator.