A Switched-Capacitor Interface for Differential Capacitance Transducers

For high-accuracy signal processing of differential capacitance transducers, an interface circuitry based on a switched-capacitor sample/hold circuit is developed. Driven by nonoverlapping two-phase clocks, the interface produces the output voltage which is proportional to the ratio of difference-to-sum of two capacitors of a differential transducer. Performances of a prototype chip fabricated using 0.6 $\mu\textrm{m}$ n-well CMOS process were measured and compared with those simulated by HSPICE. The measured results indicate that 0.1% resolution is achievable with the proposed interface and the temperature-dependence of the interface is small enough fur practical applications.