The Propagation Delay Model of the Interconnects in the High-Speed VLSI circuit

고속 VLSI회로에서 전송선의 지연시간 모델

  • 윤성태 (한양대학교 전자공학과) ;
  • 어영선 (한양대학교 전자공학과)
  • Published : 1999.11.01

Abstract

The transmission line effects of IC interconnects have a substantial effect on a hish-speed VLSI circuit performance. The effective transmission lime parameters are changed with the increase of the operation frequency because of the skin of the skin effect, proximity effect, and silicon substrate. A new signal delay estimation methodology based on the RLC-distributed circuit model is presented [2]. The methodology is demonstrated by using SPICE simulation and a high-frequency experiment technique.

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