Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)
- 1996.07b
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- Pages.1286-1288
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- 1996
Design and Implementation of Add/Drop control chip using AT&T ORCA FPGA
AT&T ORCA FPGA를 이용한 Add/DroP Control Chip의 설계
- Lee, Sang-Hoon (Dept. of Electronic Eng., Hanseo Univ.) ;
- Sung, Yung-Kwon (Dept. of Electrical Eng., Korea Univ.)
- Published : 1996.07.22
Abstract
An add/drop control chip for SDH transmission system has been designed in AT&T 0.5um CMOS ORCA FPGA. This device plays an important role in achieving self-healing ring operation which protects against failure. After this device receives each 24-ch AU-3 signals from the west, east, and add parts, it outputs each 24-ch switched signals through the control data of system control port. This device consists of eight sub-part such west/east transmitting part, west/east receiving part, add/drop control part, AIS control part, and CPU interface part. The designed device is capable to ring networks as well as linear networks.
Keywords