Proceedings of the Korean Institute of Communication Sciences Conference (한국통신학회:학술대회논문집)
- 1987.04a
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- Pages.230-233
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- 1987
A study on the Dual Digital Phase Locked Loop
Dual-Digital Phase-Locked Loop에 관한 연구
Abstract
A Dual Disital Phase Locked Loop is analyzeddesigned and tested. Two specific confisurations are considered generations second and thisrd order DPLL’s and it is found using a computer simulation and verified therretically . As a result of computer simulation the characteristcof designed I-Dullis better than the at of P-DPLL or C-Dull
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