• ETRI Journal
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• v.32 no.4
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• pp.540-547
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• 2010

One of the critical issues in on-chip serial communications is increased power consumption. In general, serial communications tend to dissipate more energy than parallel communications due to bit multiplexing. This paper proposes a low-power bus serialization method. This encodes bus signals prior to serialization so that they are converted into signals that do not greatly increase in transition frequency when serialized. It significantly reduces the frequency by making the best use of word-to-word and bit-by-bit correlations presented in original parallel signals. The method is applied to the revision of an MPEG-4 processor, and the simulation results show that the proposed method surpasses the existing one. In addition, it is cost-effective when implemented as a hardware circuit since its algorithm is very simple.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.959-961
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• 2003

In this paper, we describe implemented DMAC (Direct Memory Access Controller) architecture on Altera's $Excalibur^{TM}$ that includes industry-standard $ARM922T^{TM}$ 32-bit RISC processor core operating at 200 MHz. We implemented DMAC based on AMBA (Advanced Micro-controller Bus Architecture) AHB (Advanced Micro-performance Bus) interface. Implemented DMAC has 8-channel and can extend supportable channel count according to user application. We used round-robin method for priority selection. Implemented DMAC supports data transfer between Memory-to-Memory, Memory-to-Peripheral and Peripheral-to-Memory. The max transfer count is 1024 per a time and it can support byte, half-word and word transfer according to AHB protocol (HSIZE signals). We implemented with VHDL and functional verification using $ModelSim^{TM}$. Then, we synthesized using $LeonardoSpectrum^{TM}$ with Altera $Excalibur^{TM}$ library. We did FPGA P&R and targeting using $Quartus^{TM}$. We can use implemented DMAC module at any system that needs high speed and broad bandwidth data transfers.

• Journal of the Korea Society of Computer and Information
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• v.18 no.10
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• pp.163-172
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• 2013

This study was conducted to explore a method of displaying optimized letters that fit the size of tables using a genetic algorithm. As a result, fonts with optimized letters of different lengths were offered through optimum values of the font size, line spacing, and letter spacing by calculating the width and height of the cell and number of letters to be entered. This study is significant in that it provides a solution to letter optimization issues in fixed cells that occur in various word processors that are currently used, through the genetic algorithm.

• Communications of the Korean Institute of Information Scientists and Engineers
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• v.1 no.1
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• pp.75-79
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• 1983

現代 컴퓨터의 연산장치(Arithmetic unit)의 design을 하는데 있어서 가장 중요하게 요구점점되는 點은 계산의 속도(Computational speed)와 計算의 정확성 (Computational accuracy)이라고 보겠다. 여기서는 정보처리기(Information processor)로서 또는 非數理的인 연산(Non-numeric operation)을 위한 도구로서 보다는 數理的 연산(Arithmetic)을 수행하는 도구로서의 컴퓨터 연산에 限해서만 論하고자 한다. 대개의 경우 기계를 고안하는 사람들은 계사의 속도에 對해서는 특별한 관심을 갖고 그러한 목적에 맞는 기계를 만들어 낼려고 하지만 數値의 정 확성(Numerical accuracy)에 對해서ㅡ 등한시했던 경우가 많았다고 보겠다. 그러 나 이 두 條件 즉 빠른 속도 틀림없는 정확성을 同時에 충족 시키고자 하는 것이 기계 고안자들의 理想 목포가 되는 것은 사시링다. 여기에 수반도는 문제는 제작 비를 고려하지 않을 수 없다는 것이다. 정화하고 빠른 operation을 할 수 있는 기 계는 너무 비싼 제작비가 들기 때문에 사용목적에 적절하게 두 문제를 절충하여 고려하는 것이 일반적이라 하겠다. 初期의 컴퓨터는 한 Word(Computer Word)로 서 36개의 bit를 사용한 것이 많았다고 본다. 그러나 1961년 4月 Tennessee에서 Oak Riage National Laboratory와 The Society for Industril and Applied Mathematics 후원하에 일주일에 걸친 국제회의가 열렸었는데 거기 모인 거의 모 든 學者들이 앞으로의 과학 연구용 컴퓨터(Scientific Computer)의 한 Word의 길 이는 적어도 48bit 이상으로 증가시켜야 된다는데 의견을 모았었다고 한다. 이제 rounding error의 성향(begavior)을 알아보기 위한 간단한 例를 들어 봄으로써 이 글을 쓰는 동기으 일면을 대신하고자 한다.

• Journal of information and communication convergence engineering
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• v.9 no.6
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• pp.706-711
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• 2011

In accordance with development of smart phone, the importance of keypad was increasing, because the smart phone provides a variety of feature like word processor, chatting program, messenger and etc. In this paper, we propose the new Hangeul keypad for smart phones using gestures. And, also we do experiment for performance evaluation of the proposed keypad in this paper. The experiment shows that the proposed keypad is more efficient than other keypads.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.3C
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• pp.240-246
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• 2008

An MPEG-2/4 AAC decoder on 16-bit fixed-point processor is presented in this paper. To meet audio quality criteria, despite small word length, special design methods for 16-bit foxed-point AAC decoder were devised. This paper presents particular algorithms for 16-bit AAC decoding. We have implemented an efficient AAC decoder using the proposed algorithms. Audio contents can be replayed in the decoder without quality degradation.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2005.11a
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• pp.204-205
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• 2005

The following instructions give you basic guidelines for preparing camera-ready papers for the proceeding of the KOSME. We recommend you to use the HWP word processor.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.5B
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• pp.685-691
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• 2001

본 논문은 4단계 파이프 라인과 VLIW (Very Long Instruction Word) 구조를 갖는 FLOVA라는 DSP 프로세서의 테스트용이 설계 기법을 다룬다. Full-scan design, BIST(Built-In-Self-Test), IEEE 1149.1의 기법들이 플립플롭과 floaing point unit, 내장된 메모리, I/O cell 등에 각각 적용되었다. 이러한 기법들은 테스트 용이도의 관점에서 FLOVA의 구조에 적절하게 적용되었다. 본 논문에서는 이와 같이 FLOVA에 적용된 테스트 용이 설계의 특징들을 중심으로 상세하게 기술한다.

• Journal of IKEEE
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• v.23 no.1
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• pp.58-67
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• 2019

A design of an elliptic curve cryptography (ECC) processor that supports both pseudo-random curves and Koblitz curves over $GF(2^m)$ defined by the NIST standard is described in this paper. A finite field arithmetic circuit based on a word-based Montgomery multiplier was designed to support five key lengths using a datapath of fixed size, as well as to achieve a lightweight hardware implementation. In addition, Lopez-Dahab's coordinate system was adopted to remove the finite field division operation. The ECC processor was implemented in the FPGA verification platform and the hardware operation was verified by Elliptic Curve Diffie-Hellman (ECDH) key exchange protocol operation. The ECC processor that was synthesized with a 180-nm CMOS cell library occupied 10,674 gate equivalents (GEs) and a dual-port RAM of 9 kbits, and the maximum clock frequency was estimated at 154 MHz. The scalar multiplication operation over the 223-bit pseudo-random elliptic curve takes 1,112,221 clock cycles and has a throughput of 32.3 kbps.

• Journal of Korean Medical classics
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• v.19 no.3
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• pp.138-164
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• 2006

In the field of oriental medicine, many researchers head for the aim of standardization. To achieve this aim, oriental medical researchers have been carried out experimental research, statistical research, clinical research, philological research, etc., and, have published their results to journals. But, the declaration of Roman name of herbal formula is not united each other, on several article. So, we should prepare database to search in domestic and overseas, and should consider compatibility of internationally used search system. Also, it is need to use appropriate roman letters in oriental medical terms for people can use easily. We inquired the type of roman letters in the name of formula of article that were carried oriental medical journal, to find out appropriate roman letters and to the demands of the times. There were many cases that Korean name of formula is not correspond to the declaration of Korea roman letters. Also, the declaration of roman letters for preparation like as tang(湯), san(散), hwan(丸) etc. are not standardized. To facilitate making database and forming search system, now we suggest that we can standardize the declaration of Korea roman letters by using of Hangul(한글) word processor's toolbar which has transformation of roman letters.