• 제목/요약/키워드: voltage balance

검색결과 301건 처리시간 0.028초

Power Balance 조건을 이용한 부스트 컨버터의 효율 분석 (Efficiency analysis of the boost converter using power balance condition)

  • 이국선;최익;최주엽;송승호;안진웅
    • 한국태양에너지학회 논문집
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    • 제31권2호
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    • pp.120-127
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    • 2011
  • Solar array has the following nonlinear characteristic, such as whose output current increases, output voltage is reduced. For this reason, boost converter with solar array system is always controlled to remain on the maximum power point of the solar array. In this case, we are not focused on the output of the solar array and not consider efficiency of the boost converter, which is assumed reliable. But efficiency of the converter also should be considered, which affects the total efficiency of the overall solar energy system. In this paper, efficiency calculation of the boost converter using power balance method is proposed, which will be used for a powerful reference before hardware realization.

저 전압스트레스 및 다채널 전류 평형을 위한 Floating 전압 스택형 단일스위치 LED 구동회로 (Floating Voltage Stacked LED Driver for Low Voltage Stress and Multi-channel Current Balancing)

  • 황원선;황상수;강정일;한상규
    • 전력전자학회논문지
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    • 제20권2호
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    • pp.122-129
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    • 2015
  • In this study, we propose a low voltage stress and cost-effective light emitting diode (LED) driver capable of multi-channel current balancing. Conventional LED drivers require as many boost converters as the number of LED channels, whereas the proposed LED driver requires only one buck converter and several balancing capacitors instead of several expensive boost converters. Additionally, while the components of the boost converter have high voltage stress and depend on the LED driving voltage, components of the proposed driver have about one-half of the voltage stress across all components. The proposed driver exhibits high reliability and cost effectiveness because it only uses few DC blocking capacitors with no additional active devices to balance the current of multi-channel LEDs. The proposed driver exhibits high reliability and cost effectiveness. The validity of the proposed driver is confirmed through a theoretical analysis. An explanation of the design considerations and experimental results were obtained using a prototype applicable to a 46" LED-TV.

Novel Five-Level Three-Phase Hybrid-Clamped Converter with Reduced Components

  • Chen, Bin;Yao, Wenxi;Lu, Zhengyu
    • Journal of Power Electronics
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    • 제14권6호
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    • pp.1119-1129
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    • 2014
  • This study proposes a novel five-level three-phase hybrid-clamped converter composed of only six switches and one flying capacitor (FC) per phase. The capacitor-voltage-drift phenomenon of the converter under the classical sinusoidal pulse width modulation (SPWM) strategy is comprehensively analyzed. The average current, which flows into the FC, is a function of power factor and modulation index and does not remain at zero. Thus, a specific modulation strategy based on space vector modulation (SVM) is developed to balance the voltage of DC-link and FCs by injecting a common-mode voltage. This strategy applies the five-segment method to synthesize the voltage vector, such that switching losses are reduced while optional vector sequences are increased. The best vector sequence is then selected on the basis of the minimized cost function to suppress the divergence of the capacitor voltage. This study further proposes a startup method that charges the DC-link and FCs without any additional circuits. Simulation and experimental results verify the validity of the proposed converter, modulation strategy, and precharge method.

Neutral-Point-Clamped 인버터의 저 변조지수에서 DC 링크 전압 균형을 위한 간단한 컨트롤 기법 (A Simple Control Strategy for Balancing the DC-link Voltage of Neutral-Point-Clamped Inverters at low modulation index)

  • 마창수;김태진;강대욱;현동석
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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    • pp.560-564
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    • 2003
  • This paper proposes a simple control strategy based on the discontinuous PWM(DPWM) to balance the DC-link voltage of three-level Neutral-Point-Clamped(WPC) inverters at low modulation index. New DPWM methods in multi-level inverter are also introduced. The proposed DPWM method changes the path and duration to flow the neutral point current out of or into neutral point of the DC-link and it makes the overall fluctuation of the DC-link voltage zero during a sampling time of reference voltage vector. Therefore, the voltage of the DC-link can be balanced fairly well and also the voltage ripple of the DC-link is reduced significantly. Moreover, comparing with conventional methods, the proposed strategy is very simple. The validity of the proposed DPWM method is verified by experiment

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Modeling, Simulation and Fault Diagnosis of IPFC using PEMFC for High Power Applications

  • Darly, S.S.;Vanaja Ranjan, P.;Justus Rabi, B.
    • Journal of Electrical Engineering and Technology
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    • 제8권4호
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    • pp.760-765
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    • 2013
  • An Interline Power Flow Controller (IPFC) is a converter based controller which compensates and balance the power flow among multi-lines within the same corridor of the multi-line subsystem. The Interline Power Flow Controller consists of a voltage source converter based Flexible AC Transmission System (FACTS) controller for series compensation. The reactive voltage injected by individual Voltage Source Converter (VSC) can be controlled to regulate active power flow in the respective line in which one VSC regulates the DC voltage, the other one controls the reactive power flows in the lines by injecting series active voltage. In this paper, a circuit model for IPFC is developed and simulation of interline power flow controller is done using the proposed circuit model. Simulation is done using MATLAB Simulink and PSPICE. The results obtained by MATLAB are compared with the results obtained by PSPICE and compared with theoretical values.

직렬 입력 병렬 출력 연결된 LLC 컨버터를 갖는 비엔나 정류기의 DC 링크 전압 평형 제어에 관한 연구 (A Study on the Affected of DC-Link Voltage Balance Control of the Vienna Rectifier Linked With the Input Series Output Parallel LLC Converter)

  • 백승우;김학원;조관열
    • 전력전자학회논문지
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    • 제26권3호
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    • pp.205-213
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    • 2021
  • Due to the advantage of reducing the voltage applied to the switch semiconductor, the input series and output parallel combination is widely used in systems with high input voltage and large output current. On the other hand, the LLC converter is widely used as a high-efficiency power converter, and when connected by ISOP combination, there is a possibility that input voltage imbalance may occur due to a mismatch of passive devices. To avoid damaging the switching device, this study analyzed the DC-link voltage imbalance of a high-capacity supply using an ISOP LLC converter. In addition, the case where DC-link unbalance control was applied and the case not applied was analyzed respectively. Based on this analysis, an initial start-up algorithm was proposed to prevent input power semiconductor device damage due to DC-link over-voltage. The effectiveness of the proposed algorithm has been verified through simulations and experiments.

PWM 방식을 이용한 옵셋 전압 주입에 따른 MMC 시스템 내부 에너지 맥동 분석 (Analysis of Internal Energy Pulsation in MMC System According to Offset Voltage Injection with PWM Methods)

  • 김재명;정재정
    • 전기전자학회논문지
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    • 제23권4호
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    • pp.1140-1149
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    • 2019
  • 전압형 컨버터의 다양한 전압 합성 방법을 구현하기 위해서, 옵셋 전압을 주입하는 방법이 널리 사용되고 있다. 즉, 전압 변조 방식(pulse width modulation; PWM)들은 교류 측 전압 지령에 적절한 옵셋 전압을 주입하는 것과 수학적으로 동일하다. 이러한 옵셋 전압을 이용한 AC 단 출력 전압 합성 방법에 따라 DC 단 전압의 전압 이용률이 달라지며, 이는 모듈형 다단 컨버터(modular multilevel converter; MMC) 시스템에서도 동일하다. 따라서, DC 단의 용량이 정해져 있는 고압 직류(high voltage DC; HVDC) 송전 시스템의 경우에도 AC 단에 옵셋 전압을 이용함에 따라 AC 단으로 공급 가능한 최대 무효 전력의 크기를 변화시킬 수 있다. 본 논문에서는 대표적인 전압 변조 방식을 적용한 옵셋 전압 주입 시 합성된 AC 측 출력 전압에 따라 MMC 시스템의 레그 에너지 맥동을 수학적으로 분석하였다. 또한, 이를 실제 스케일의 400MVA급 MMC 시스템 시뮬레이션을 통해 수학적 분석의 경향성을 검증하였다.

Torque Ripple Reduction in Three-Level Inverter-Fed Permanent Magnet Synchronous Motor Drives by Duty-Cycle Direct Torque Control Using an Evaluation Table

  • Chen, Wei;Zhao, Ying-Ying;Zhou, Zhan-Qing;Yan, Yan;Xia, Chang-Liang
    • Journal of Power Electronics
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    • 제17권2호
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    • pp.368-379
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    • 2017
  • In this paper, a direct torque control algorithm with novel duty cycle-based modulation is proposed for permanent magnet synchronous motor drives fed by neutral-point clamped three-level inverters. Compared with the standard DTC, the proposed algorithm can suppress steady-state torque ripples as well as ensure neutral-point potential balance and smooth vector switching. A unified torque/flux evaluation table with multiple voltage vectors and precise control levels is established and used in this method. This table can be used to evaluate the effects of duty-cycle vectors on torque and flux directly, and the elements of the table are independent of the motor parameters. Consequently, a high number of appropriate voltage vectors and their corresponding duty cycles can be selected as candidate vectors to reduce torque ripples by looking up the table. Furthermore, small vectors are incorporated into the table to ensure the neutral-point potential balance with the numerous candidate vectors. The feasibility and effectiveness of the proposed algorithm are verified by both simulations and experiments.

Control and Implementation of Dual-Stator-Winding Induction Generator for Variable Frequency AC-Generating System

  • Bu, Feifei;Hu, Yuwen;Huang, Wenxin;Shi, Kai
    • Journal of Power Electronics
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    • 제13권5호
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    • pp.798-805
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    • 2013
  • This paper presents the control and implementation of the dual-stator-winding induction generator for variable frequency AC (VFAC) generating system. This generator has two sets of stator windings embedded into the stator slots. The power winding produces the VFAC power to feed the loads, and the control winding is connected to the static excitation controller to control the generator for output voltage regulation with speed and load variations. On the basis of the idea of power balance, an instantaneous slip frequency control (ISFC) strategy using the information of both the output voltage and the output power is used in this system. A series of experiments is carried out on a 15 kW prototype for verification. Results show that the system has good static and dynamic performance in a wide speed range, which demonstrates that the ISFC strategy is suitable for this system.

Digital CMOS Temperature Sensor Implemented using Switched-Capacitor Circuits

  • Son, Bich;Park, Byeong-Jun;Gu, Gwang-Hoe;Cho, Dae-Eun;Park, Hueon-Beom;Jeong, Hang-Geun
    • 센서학회지
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    • 제25권5호
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    • pp.326-332
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    • 2016
  • A novel CMOS temperature sensor with binary output is implemented by using fully differential switched-capacitor circuits for resistorless implementation of the temperature sensor core. Temperature sensing is based on the temperature characteristics of the pn diodes implemented by substrate pnp transistors fabricated using standard CMOS processes. The binary outputs are generated by using the charge-balance principle that eliminates the division operation of the PTAT voltage by the bandgap reference voltage. The chip was designed in a MagnaChip $0.35-{\mu}m$ CMOS process, and the designed circuit was verified using Spectre circuit simulations. The verified circuit was laid out in an area of $950{\mu}m{\times}557 {\mu}m$ and is currently under fabrication.