• Title/Summary/Keyword: video encoder

Search Result 447, Processing Time 0.028 seconds

A Multi-Channel Trick Mode Play Algorithm and Hardware Implementation of H.264/AVC for Surveillance Applications (H.264/AVC 감시 어플리케이션용 멀티 채널 트릭 모드 재생 알고리즘 및 하드웨어 구현)

  • Jo, Hyeonsu;Hong, Youpyo
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.41 no.12
    • /
    • pp.1834-1843
    • /
    • 2016
  • DVRs are the most common recording and displaying devices used for surveillance. Video compression plays a key role in DVRs for saving storage; the video compression standard, H.264/AVC, has recently become the dominant choice for DVRs. DVRs require various display modes, such as fast-forward, backward play, and pause; these are called trick modes. The implementation of precise trick mode play requires a very high decoding capability or a very intelligent scheme in order to handle the high computation complexity. The complexity is increased in many surveillance applications where more than one camera is used to monitor multiple spots or to monitor the same area using various angles. An implementation of a trick mode play and a frame buffer management scheme for the hardware-based H.264/AVC codec for multi-channel is presented in this paper. The experimental results show that exact trick mode play is possible using a standard H.264/AVC video codec with keyframe encoding feature at the expense of bitstream size increase.

Error Detection and Concealment of Transmission Error Using Watermark (워터마크를 이용한 전송 채널 에러의 검출 및 은닉)

  • 박운기;전병우
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.29 no.2C
    • /
    • pp.262-271
    • /
    • 2004
  • There are channel errors when video data are transmitted between encoder and decoder. These channel errors would make decoded image incorrect, so it is very important to detect and recover channel errors. This paper proposes a method of error detection and recovery by hiding specific information into video bitstream using fragile watermark and checking it later. The proposed method requires no additional bits into compressed bitstream since it embeds a user-specific data pattern in the least significant bits of LEVELs in VLC codewords. The decoder can extract the information to check whether the received bitstream has an error or not. We also propose to use this method to embed essential data such as motion vectors that can be used for error recovery. The proposed method can detect corrupted MBs that usually escape the conventional syntax-based error detection scheme. This proposed method is quite simple and of low complexity. So the method can be applied to multimedia communication system in low bitrate wireless channel.

A Study using Variable Blocks of Boundary Matching Method for H.264 to MPEG-2 Video Transcoding (가변블럭의 경계정합방법을 이용한 H.264 to MPEG-2 Video Transcoding 연구)

  • Son, Nam-Rye;Jung, Min-A;Lee, Sung-Ro;Lee, Guee-Sang
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.34 no.11C
    • /
    • pp.1049-1058
    • /
    • 2009
  • After the efficiency of H.264 video compression has been announced, it replaced MPEG-2 standard in several applications. So transcoding methods of MPEG-2 to H.264 have been studying because there are variety devices and contents followed by MPEG-2. Although H.264 supported various service such as IPTV, DMB, digital broadcasting etc, but users using MPEG-2 devices cannot accessible to them. This paper propose H.264 to MPEG-2 transcoding for users of MPEG-2 devices without displacement H.264. The proposed method predicted a motion vector for MPEG-2 encoder after it extracted from motion vectors of variable blocks in H.264 to improve processing time. Also it predicted a optimal motion vector using modified boundary matching algorithm after grasped a special character for boundary and background of object. The experimental results from proposed method show a considerable reduction in processing time, as much as 65% averagely, with a small objective quality reduction in PSNR.

Model Parameter-based Rate Control Algorithm for Constant Quality Real-Time Video Coding (실시간 부호화를 위한 모델 파라미터 기반 일정 화질 비트율 제어 기법)

  • Jeong, Jin-Woo;Cho, Kyung-Min;Choe, Yoon-Sik
    • Journal of the Institute of Electronics Engineers of Korea SP
    • /
    • v.45 no.3
    • /
    • pp.93-102
    • /
    • 2008
  • In this paper, we propose a rate control algorithm for constant quality real time video coding. To achieve constant quality, previous algorithm exploit mean absolute of difference(MAD) as measure of frame complexity. However, if scene is abruptly changed or if quantization parameter is not constant, encoder produces various output bits with same MAD. Therefore we know that MAD does not appropriately reflect characteristic of frame. To solve this problem, we exploit model parameter as measure of frame complexity. Because model parameter means slope between output bits and MAD, it reflects correctly complexity of frame. And because previous model, R-MAD model, is not considered quantization parameter, as quantization parameter increases or decreases, model parameter of frame also vary. So model parameter obtained using previous model cannot reflect internal characteristic of video. We solve this problem using proposed model, which is considered quantization parameter. Experiment results show that our algorithm provide better performance, in terms of quality smoothness than previous algorithm. Especially, when scene is abruptly changed, our algorithm alleviates quality drop.

A Side Information Generation Using Adaptive Estimation and Its Performance Comparison in PDWZ CODEC (화소 영역 Wyner-Ziv코덱에서 적응적 예측을 통한 보조정보 생성 방식과 성능 비교)

  • Kim, Jin-Soo;Kim, Jae-Gon;Seo, Kwang-Deok
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.14 no.2
    • /
    • pp.383-393
    • /
    • 2010
  • DVC (Distributed Video Coding) allows us to explore the video statistics at the decoder side, resulting in a less complex encoder and more complex decoder. In this approach, it is important to generate a good prediction to the current Wyner-Ziv frame, called side information, which plays a crucial role in the overall performance of a DVC system. Conventional MCFI (motion compensated frame interpolation) techniques, which explore temporal correlations between neighbor frames of the current frame, preform the block-based or object-based motion estimation, but, they do not include the basis frame for the Wyner-Ziv frame. This paper proposes an efficient way to get better side information, by finding the average frame between neighbor frames and by comparing adaptively the candidate blocks. Through computer simulations, it is shown that the proposed method can improve the performance up to 0.4dB and provide better subjective and objective visual qualities in Wyner-Ziv CODEC.

MPEG-DASH based 3D Point Cloud Content Configuration Method (MPEG-DASH 기반 3차원 포인트 클라우드 콘텐츠 구성 방안)

  • Kim, Doohwan;Im, Jiheon;Kim, Kyuheon
    • Journal of Broadcast Engineering
    • /
    • v.24 no.4
    • /
    • pp.660-669
    • /
    • 2019
  • Recently, with the development of three-dimensional scanning devices and multi-dimensional array cameras, research is continuously conducted on techniques for handling three-dimensional data in application fields such as AR (Augmented Reality) / VR (Virtual Reality) and autonomous traveling. In particular, in the AR / VR field, content that expresses 3D video as point data has appeared, but this requires a larger amount of data than conventional 2D images. Therefore, in order to serve 3D point cloud content to users, various technological developments such as highly efficient encoding / decoding and storage, transfer, etc. are required. In this paper, V-PCC bit stream created using V-PCC encoder proposed in MPEG-I (MPEG-Immersive) V-PCC (Video based Point Cloud Compression) group, It is defined by the MPEG-DASH (Dynamic Adaptive Streaming over HTTP) standard, and provides to be composed of segments. Also, in order to provide the user with the information of the 3D coordinate system, the depth information parameter of the signaling message is additionally defined. Then, we design a verification platform to verify the technology proposed in this paper, and confirm it in terms of the algorithm of the proposed technology.

Pipelined Scheduling of Functional HW/SW Modules for Platform-Based SoC Design

  • Kim, Won-Jong;Chang, June-Young;Cho, Han-Jin
    • ETRI Journal
    • /
    • v.27 no.5
    • /
    • pp.533-538
    • /
    • 2005
  • We developed a pipelined scheduling technique of functional hardware and software modules for platform-based system-on-a-chip (SoC) designs. It is based on a modified list scheduling algorithm. We used the pipelined scheduling technique for a performance analysis of an MPEG4 video encoder application. Then, we applied it for architecture exploration to achieve a better performance. In our experiments, the modified SoC platform with 6 pipelines for the 32-bit dual layer architecture shows a 118% improvement in performance compared to the given basic SoC platform with 4 pipelines for the 16-bit single-layer architecture.

  • PDF

An Efficient Hardware Architecture of Intra Prediction and TQ/IQIT Module for H.264 Encoder

  • Suh, Ki-Bum;Park, Seong-Mo;Cho, Han-Jin
    • ETRI Journal
    • /
    • v.27 no.5
    • /
    • pp.511-524
    • /
    • 2005
  • In this paper, we propose a novel hardware architecture for an intra-prediction, integer transform, quantization, inverse integer transform, inverse quantization, and mode decision module for the macroblock engine of a new video coding standard, H.264. To reduce the cycle of intra prediction, transform/quantization, and inverse quantization/inverse transform of H.264, a reduction method for cycle overhead in the case of I16MB mode is proposed. This method can process one macroblock for 927 cycles for all cases of macroblock type by processing $4{\times}4$ Hadamard transform and quantization during $16{\times}16$ prediction. This module was designed using Verilog Hardware Description Language (HDL) and operates with a 54 MHz clock using the Hynix $0.35 {\mu}m$ TLM (triple layer metal) library.

  • PDF

The overall structure and operation of MPEG-2 TM5 encoder (MPEG-2 TM5 부호기의 구조와 작동)

  • 김준기;이호석
    • Proceedings of the Korean Information Science Society Conference
    • /
    • 1999.10b
    • /
    • pp.259-261
    • /
    • 1999
  • 본 논문은 MPEG-2 TM 5 video 부호기의 전체구조 및 처리과정을 기술한다. MPEG-2는 저장 매체, 통신, 방송 매체 등을 위한 동영상 압축이 표준이다. MPEG-2 압축 방법에는 공간적 압축과 시간적 압축 방법이 있다. 공간적 압축 방법에는 화면에서의 중복성을 줄이기 위한 표본화 주파수(4:4:4, 4:2:2, 4:2:0, format), DCT, scanning(zigzag 혹은 alternate scanning)과 quantization이 있고 시간적 압축 방법에는 움직임 예측(motion estimation)과 I, P, B-picture를 사용하는 방법이 있다. 본 논문에서는 MPEG-2 부호기의 핵심을 전체 구조, DPCM, MPEG bitstream syntax, MPEG-2 부호화 알고리즘, 움직임 예측, 움직임 벡터, rate control 그리고 가변길이 코딩(variable length coding)으로 구분하여 소개한다.

  • PDF

Hardware Implementation of HEVC CABAC Binarizer

  • Pham, Duyen Hai;Moon, Jeonhak;Lee, Seongsoo
    • Journal of IKEEE
    • /
    • v.18 no.3
    • /
    • pp.356-361
    • /
    • 2014
  • This paper proposes hardware architecture of HEVC (high efficiency video coding) CABAC (context-based adaptive binary arithmetic coding) binarizer. The proposed binarizer was designed and implemented as an independent module that can be integrated into HEVC CABAC encoder. It generates each bin string of each syntax element in a single cycle. It consists of controller module, TU (truncated unary binarization) module, TR (truncated Rice binarization) module, FL (fixed length binarization) module, EGK (k-th order exp-Golomb coding) module, CALR (coeff_abs_level_remaining) module, QP Delta (cu_qp_delta_abs) module, Intra Pred (intra_chroma_pred_mode) module, Inter Pred (inter_pred_idc) module, and Part Mode (part_mode) module. The proposed binarizer was designed in Verilog HDL, and it was implemented in 45 nm technology. Its operating speed, gate count, and power consumption are 200 MHz, 1,678 gates, and 50 uW, respectively.