• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.8
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• pp.8-14
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• 2008

In this paper, the effects of ground size on the characteristics such as input resistance, fractional bandwidth, and radiation efficiency of epsilon negative (ENG) zeroth order resonance (ZOR) antennas were investigated theoratically. Two types of ENG ZOR antennas were studied: mushroom ENG ZOR antenna with via and via-free defected ground structure (DGS) ENG ZOR antenna. It was confirmed that the ground size had more effects on the characteristics of a Via-free ZOR antenna than those of mushroom ZOR antenna with via. The via-free antenna could radiate properly with the required size of ground plane since the size of ground plane should exceed some critical value for DGS to suitably operate. As a height of substrate of mushroom ZOR antenna with via increased, the fractional bandwidth and radiation efficiency were improved. On the other hand, as a height of via-free ZOR antenna increased, the fractional bandwidth and radiation efficiency were degraded. Finally, a via-free ZOR antenna had an advantage of compactness even though its fractional bandwidth is narrow and its radiation efficiency is poor, compared with thoses of mushroom ZOR antenna with via.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.4
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• pp.45-50
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• 2006

Copper via filling is the important factor in 3-D stacking interconnection of SiP (system in package). As the packaging density is getting higher, the size of via is getting smaller. When DC electroplating is applied, a defect-free hole cannot be obtained in a small size via hole. To prevent the defects in holes, pulse and pulse reverse current was applied in copper via filling. The holes, $20\and\;50{\mu}m$ in diameter and $100{\sim}190\;{\mu}m$ in height. The holes were prepared by DRIE method. Ta was sputtered for copper diffusion barrier followed by copper seed layer IMP sputtering. Via specimen were filled by DC, pulse and pulse-reverse current electroplating methods. The effects of additives and current types on copper deposits were investigated. Vertical and horizontal cross section of via were observed by SEM to find the defects in via. When pulse-reverse electroplating method was used, defect free via were successfully obtained.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.2492-2497
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• 2003

This paper presents optimal walking trajectory generation for a quadruped robot with genetic-fuzzy algorithm. In order to move a quadruped robot smoothly, both generations of optimal leg trajectory and free walking are required. Generally, making free walking is difficult to realize for a quadruped robot, because the patterned trajectory may interfere in the free walking. In this paper, we suggest the generation method for the leg trajectory satisfied with free walking pattern so as to avoid obstacle and walk smoothly. We generate via points of leg with respect to body motion, and then we use the genetic-fuzzy algorithm to search for the optimal via velocity and acceleration information of legs. All these methods are verified with PC simulation program, and implemented to SERO-V robot.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.09a
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• pp.3-17
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• 2003

.Package Trend -> Memory : Lighter, Thinner, Smaller & High Density => SiP, 3D Stack -> MPU : High Pin Counts & Multi-functional => FCBGA .Interposer Trend -> Via - Unfilled Via => Filled Via - Staggered Via => Stacked Via -> Emergence of All-layer Build-up Processes -> Interposer Material Requirement => Low CTE, Low $D_{k}$, Low $D_{f}$, Halogen-free .New Technology Concept -> Embedded Passives, Imprint, MLTS, BBUL etc.

• Korean Journal of Microbiology
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• v.8 no.1
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• pp.35-40
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• 1970

In the cell-free systems of Dunaliella tertiolecta, fructosediphosphate aldolase hardly contribute to synthesize hexosephosphate from triosephosphate derived from pentosphosphate pathway, and it could be considered that glycerol synthesized from added glucose was synthesized but via 3-phosphoglyceraldehyde as an intermediate not hydroxypyruvate.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2016.11a
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• pp.128-128
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• 2016

Cu 배선폭 미세화 기술은 반도체 디바이스의 성능 향상을 위한 핵심 기술이다. 현재 배선 기술은 lithography, deposition, planarization등 종합적인 공정 기술의 발전에 따라 10x nm scale까지 감소하였다. 하지만 지속적인 feature size 감소를 위하여 요구되는 높은 공정 기술 및 비용과 배선폭 미세화로 인한 재료의 물리적 한계로 인하여 배선폭 미세화를 통한 성능의 향상에는 한계가 있다. 배선폭 미세화를 통한 2차원적인 집적도 향상과는 별개로 chip들의 3차원 적층을 통하여 반도체 디바이스의 성능 향상이 가능하다. 칩들의 3차원 적층을 위해서는 별도의 3차원 배선 기술이 요구되는데, TSV(through-Si-via)방식은 Si기판을 관통하는 via를 통하여 chip간의 전기신호 교환이 최단거리에서 이루어지는 가장 진보된 형태의 3차원 배선 기술이다. Si 기판에 $50{\mu}m$이상 깊이의 via 및 seed layer를 형성 한 후 습식전해증착법을 이용하여 Cu 배선이 이루어지는데, via 내부 Cu ion 공급 한계로 인하여 일반적인 공정으로는 void와 같은 defect가 형성되어 배선 신뢰성에 문제를 발생시킨다. 이를 해결하기 위해 각종 유기 첨가제가 사용되는데, suppressor를 사용하여 Si 기판 상층부와 via 측면벽의 Cu 증착을 억제하고, accelerator를 사용하여 via 바닥면의 Cu 성장속도를 증가시켜 bottom-up TSV filling을 유도하는 방식이 일반적이다. 이론적으로, Bottom-up TSV filling은 sample 전체에서 Cu 성장을 억제하는 suppressor가 via bottom의 강한 potential로 인하여 국부적 탈착되고 via bottom에서만 Cu가 증착되어 되어 이루어지므로, accelerator가 없이도 void-free TSV filling이 가능하다. Accelerator가 Suppressor를 치환하여 오히려 bottom-up TSV filling을 방해한다는 보고도 있었다. 본 연구에서는 유기 첨가제의 치환으로 인한 TSV filling performance 저하를 방지하고, 유기 첨가제 조성을 단순화하여 용액 관리가 용이하도록 하기 위하여 suppressor만을 이용한 TSV filling 연구를 진행하였다. 먼저, suppressor의 흡착, 탈착 특성을 이해하기 위한 연구가 진행되었고, 이를 바탕으로 suppressor만을 이용한 bottom-up Cu TSV filling이 진행되었다. 최종적으로 $60{\mu}m$ 깊이의 TSV를 1000초 내에 void-free filling하였다.

• Journal of the Microelectronics and Packaging Society
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• v.29 no.4
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• pp.1-8
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• 2022

High-density packaging technologies, including Through-Si-Via (TSV) technologies, are considered important in many fields such as IoT (internet of things), 6G/5G (generation) communication, and high-performance computing (HPC). Achieving high integration in two dimensional packaging has confronted with physical limitations, and hence various studies have been performed for the three-dimensional (3D) packaging technologies. In this review, we described about the causes and effects of scallop formation in TSV, the scallop-free etching technique for creating smooth sidewalls, Cu pillar and Cu-SiO₂ hybrid bonding in TSV. These technologies are expected to have effects on the formation of high-quality TSVs and the development of 3D packaging technologies.

• Advances in nano research
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• v.8 no.4
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• pp.283-292
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• 2020

In the present research, differential quadrature (DQ) method has been utilized for investigating free vibrations of porous functionally graded (FG) micro/nano beams in thermal environments. The exact location of neutral axis in FG material has been assumed where the material properties are described via porosity-dependent power-law functions. A scale factor related to couple stresses has been employed for describing size effect. The formulation of scale-dependent beam has been presented based upon a refined beam theory needless of shear correction factors. The governing equations and the associated boundary conditions have been established via Hamilton's rule and then they are solved implementing DQ method. Several graphs are provided which emphasis on the role of porosity dispersion type, porosity volume, temperature variation, scale factor and FG material index on free vibrational behavior of small scale beams.

• Journal of Ocean Engineering and Technology
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• v.36 no.2
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• pp.83-90
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• 2022

This paper presents the minimum submergence depth of an underwater vehicle that can remove the effect of free surface on the resistance of the underwater vehicle. The total resistance of the underwater vehicle in fully submerged modes comprises only viscous pressure and friction resistances, and no wave resistance should be present, based on the free surface effect. In a model test performed in this study, the resistance is measured in the range of 2 to 10 kn (1.03-5.14 m/s) under depth conditions of 850 mm (2.6D) and 1250 mm (3.8D), respectively, and the residual resistance coefficients are compared. Subsequently, resistance analysis is performed via computational fluid dynamics (CFD) simulation to investigate the free surface effect based on various submergence depths. First, the numerical analysis results in the absence of free surface conditions and the model test results are compared to show the tendency of the resistance coefficients and the reliability of the CFD simulation results. Subsequently, numerical analysis results of submergence depth presented in a reference paper are compared with the model test results. These two sets of results confirm that the resistance increased due to the free surface effect as the high speed and depth approach the free surface. Therefore, to identify a fully submerged depth that is not affected by the free surface effect, case studies for various depths are conducted via numerical analysis, and a correlation for the fully submerged depth based on the Froude number of an underwater vehicle is derived.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.3
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• pp.37-42
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• 2007

Copper deposition studies have been actively studied since interests on 3D SiP were increased. The defects inside via can be easily formed due to the current density differences on entrance, bottom and wall of via. So far many different additives and current types were discussed and optimized to obtain void-free copper via filling. In this research acid cupric sulfate plating bath containing additives such as PEG, SPS, JGB, PEI and wave current applied electroplating were examined. The size and shape of grain were influenced by the types of organic additives. The cross section of specimen were analyzed by FESEM. When PEI was added, the denser copper deposits were obtained. Electroplaing time was reduced when 2 step via filling was employed.