• Title/Summary/Keyword: transmission error

Search Result 1,901, Processing Time 0.029 seconds

The design of communication protocol for controlling efficiently modular medical instruments (모듈화된 의료장비들의 효율적 제어를 위한 통신 프로토콜 설계)

  • 신창민;김영길
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2000.10a
    • /
    • pp.284-287
    • /
    • 2000
  • Recently, developing medical devices have a tendency becoming the module for satisfying user's mutual complex needs. Because the most effective method for the observation of patients condition a diagnosis and a treatment is collecting data from various devices and controling operation following it. Module tendency is more popular due to manage easily totally many individual systems. This study implemented communication protocol to control by one control system connecting modular medical devices. Implemented system consist of one master module controlling all module and managing communication and many Slave modules. Communication between each modules introduced SPI(Serial Peripheral Interface) among many synchronous serial communication methods for the exact transmission and receipt of data. All communication executes by packet format. This can detect error. And, this protocol introduced PNP(Plug And Play) function that auto-detect connecting or removing module during running. This protocol exactly transmitted and received in faster speed more than 1Mbps. And in practical application to the ventilator this confirmed to give and take real-time data. And various functions by th central control system is implemented in this protocol.

  • PDF

Uplink Congestion Control over Asymmetric Networks using Dynamic Segment Size Control (비대칭 망에서 동적 세그먼트 크기 조정을 통한 상향링크 혼잡제어)

  • Je, Jung-Kwang;Lee, Ji-Hyun;Lim, Kyung-Shik
    • Journal of KIISE:Information Networking
    • /
    • v.34 no.6
    • /
    • pp.466-474
    • /
    • 2007
  • Asymmetric networks that the downlink bandwidth is larger than the uplink bandwidth may cause the degradation of the TCP performance due to the uplink congestion. In order to solve this problem, this paper designs and implements the Dynamic Segment Size Control mechanism which offers a suitable segment size for current networks. The proposed mechanism does not require any changes in customer premises but suppress the number of ACKs using segment reassembly technique to avoid the uplink congestion. The gateway which adapted the Dynamic Segment Size Control mechanism, detects the uplink congestion condition and dynamically measures the bandwidth asymmetric ratio and the packet loss ratio. The gateway reassembles some of segments received from the server into a large segment and transmits it to the client. This reduces the number of corresponding ACKs. In this mechanism, the SACK option is used when occurs the bit error during the transmission. Based on the simulation in the GEO satellite network environment, we analyzed the performance of the Dynamic Segment Size Control mechanism.

A 2MC-based Framework for Sensor Data Loss Decrease in Wireless Sensor Network Failures (무선센서네트워크 장애에서 센서 데이터 손실 감소를 위한 2MC기반 프레임워크)

  • Shin, DongHyun;Kim, Changhwa
    • Journal of the Korea Society for Simulation
    • /
    • v.25 no.2
    • /
    • pp.31-40
    • /
    • 2016
  • Wireless sensor networks have been used in many applications such as marine environment, army installation, etc. The sensor data is very important, because all these applications depend on sensor data. The possibility of communication failures becomes high since the surrounding environment of a wireless sense network has an sensitive effect on its communications. In particular, communication failures in underwater communications occur more frequently because of a narrow bandwidth, slow transmission speed, noises from the surrounding environments and so on. In cases of communication failures, the sensor data can be lost in the sensor data delivery process and these kinds of sensor data losses can make critical huge physical damages on human or environments in applications such as fire surveillance systems. For this reason, although a few of studies for storing and compressing sensor data have been proposed, there are lots of difficulties in actual realization of the studies due to none-existence of the framework using network communications. In this paper, we propose a framework for reducing loss of the sensor data and analyze its performance. The our analyzed results in non-framework application show a decreasing data recovery rate, T/t, as t time passes after a network failure, where T is a time period to fill the storage with sensor data after the network failure. Moreover, all the sensor data generated after a network failure are the errors impossible to recover. But, on the other hand, the analyzed results in framework application show 100% data recovery rate with 2~6% data error rate after data recovery.

The viterbi decoder implementation with efficient structure for real-time Coded Orthogonal Frequency Division Multiplexing (실시간 COFDM시스템을 위한 효율적인 구조를 갖는 비터비 디코더 설계)

  • Hwang Jong-Hee;Lee Seung-Yerl;Kim Dong-Sun;Chung Duck-Jin
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.42 no.2 s.332
    • /
    • pp.61-74
    • /
    • 2005
  • Digital Multimedia Broadcasting(DMB) is a reliable multi-service system for reception by mobile and portable receivers. DMB system allows interference-free reception under the conditions of multipath propagation and transmission errors using COFDM modulation scheme, simultaneously, needs powerful channel error's correction ability. Viterbi Decoder for DMB receiver uses punctured convolutional code and needs lots of computations for real-time operation. So, it is desired to design a high speed and low-power hardware scheme for Viterbi decoder. This paper proposes a combined add-compare-select(ACS) and path metric normalization(PMN) unit for computation power. The proposed PMN architecture reduces the problem of the critical path by applying fixed value for selection algorithm due to the comparison tree which has a weak point from structure with the high-speed operation. The proposed ACS uses the decomposition and the pre-computation technique for reducing the complicated degree of the adder, the comparator and multiplexer. According to a simulation result, reduction of area $3.78\%$, power consumption $12.22\%$, maximum gate delay $23.80\%$ occurred from punctured viterbi decoder for DMB system.

The effects of various exposure times in the detectability on the tips of the endodontic files in Digora$\textregistered$ (Digora$\textregistered$에서 노출시간의 변화가 근관치료용 file의 첨부식별에 미치는 영향)

  • Ko Jee-Young;Park Chang-Seo
    • Journal of Korean Academy of Oral and Maxillofacial Radiology
    • /
    • v.27 no.1
    • /
    • pp.55-71
    • /
    • 1997
  • Digora/sup (R)/ an intraoral digital radiography system utilizing image plate (IP) - has a dynamic range of exposure time which allows it to decrease the patient's exposure time and to increase diagnostic ability through image processing, transmission and storage. The purpose of this study was to evaluate the Digora/sup (R)/ system by assessing the effects of various exposure times on the detectability on the tip of the endodontic file. Examining the root canals of 45 extracted sound premolars, K -files No. 10, 15, and 20 were placed at slightly varying distances from the apex. The teeth were glued onto resin-plaster blocks. Five exposure times varying between 0.01 seconds and 0.25 seconds were used. Four observers were asked to measure the distance between the tip of the file and a reduction of crown portion, and obtained mean errors (subtracting true file length from the measured file length), comparing Digora/sup (R)/ monitors with E-plus films, which were both obtained under the same geometrical positions. The results were as follows : 1. Comparing E-plus film with Digora/sup (R)/ at 0.01 seconds, the mean errors in E-plus film showed -4.453 nun, -4.497 nun, and -3.857 nun, while the mean errors in Digora/sup (R)/ showed 0.065 nun, 0.607 nun, and 0.719 mm according to the file groups. Therefore there was a significant difference between E-plus film and Digora/sup (R)/(p<0.05). 2. By comparison of mean errors according to the various exposure times in the Digora/sup (R)/ system, the mean error at 0.01 seconds was significantly lower than that at 0.12 and 0.25 seconds in the No. 10 file group(p<0.05). And the standard deviation was the highest at 0.01 seconds. 3. Comparing E-plus film at 0.25 seconds with the Digora/sup (R)/ system, the mean errors showed a significant difference between E-plus film at 0.25 seconds and the Digora/sup (R)/ system at 0.25 seconds in No. 10 and 20 file groups(p<0.05). 4. Comparing E -plus film at 0.25 seconds with other exposure times, the mean errors showed a significant difference between E-plus film at 0.25 seconds and E-plus film at 0 .. 01 and 0.03 seconds in 10 file group(p<0.05). In the No. 15 and 20 file groups, there was a significant difference between E-plus film at 0.25 seconds and E-plus film at 0.01 seconds(p<0.05). In conclusion, Digora/sup (R)/ was better than E-plus film in detectability on the tip of the file at the exposure time of 0.01 seconds in all file groups. And we concluded that Digora/sup (R)/ can shorten exposure times up to 4% of 0.25 seconds (0.01 sec), which is adequate exposure time for premolar in E-plus film using No. 15 and 20 files.

  • PDF

Design and Implementation of 8b/10b Encoder/Decoder for Serial ATA (직렬 ATA용 8b/10b 인코더와 디코더 설계 및 구현)

  • Heo Jung-Hwa;Park Nho-Kyung;Park Sang-Bong
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.29 no.1A
    • /
    • pp.93-98
    • /
    • 2004
  • Serial ATA interface Is inexpensive comparatively and performance is superior. So it is suitable technology in demand that now require data transmission and throughput of high speed. This paper describes a design and implementation of Serial ATA Link layer about error detection and 8b/10b encoder/decoder for DC balance in frequency 150MHz. The 8b/10b Encoder is partitioned into a 5b/6b plus a 3b/4b coder. The logical model of the block is described by using Verilog HDL at register transistor level and the verified HDL is synthesized using standard cell libraries. And it is fabricated with $0.35{\mu}m$ Standard CMOS Cell library and the chip size is about $1500{\mu}m\;*\;1500{\mu}m$. The function of this chip has been verified and tested using testboard with FPGA equipment and IDEC ATS2 test equipment. It is used to frequency of 100MHz in verification processes and supply voltage 3.3V. The result of testing is well on the system clock 100MHz. The designed and verified each blocks may be used IP in the field of high speed serial data communication.

Adaptive Correlation Receiver for Frequency Hopping Multi-band Ultra-Wideband Communications (주파수 도약 멀티 밴드 초 광대역 통신을 위한 적응적 상관 수신기 방식)

  • Lee, Ye-Hoon;Choi, Myeong-Soo;Lee, Seong-Ro;Lee, Jin-Seok;Jung, Min-A
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.34 no.5A
    • /
    • pp.401-407
    • /
    • 2009
  • The multi-band (MB) ultra-wideband (UWB) communication system divides its available frequency spectrum in 3.1 to 10.6GHz into 16 sub-bands, which leads to inherent disparities between carrier frequencies of each sub-band. For instance, the highest carrier frequency is 2.65 times higher than the lowest one. Since the propagation loss is proportional to the square of the transmission frequency, the propagation loss on the sub-band having the highest carrier frequency is approximately 7 times larger than that on the sub-band having the lowest carrier frequency, which results in disparities between received signal powers on each sub-band. In this paper, we propose a novel correlation scheme for frequency hopping (FH) MB UWB communications, where the correlation time is adaptively adjusted relative to the sub-band, which reduces the disparity between the received signal energies on each sub-band. Such compensation for lower received powers on sub-bands having higher carrier frequency leads to an improvement on the total average bit error rate (BER) of the entire FH MB UWB communication system. We analyze the performance of the proposed correlation scheme in Nakagami fading channels, and it is shown that the performance gain provided by the proposed correlator is more significant as the Nakagami fading index n increases (i.e., better channel conditions).

A New Resource Allocation with Rate Proportionality Constraints in OFDMA Systems (OFDMA 시스템에서 비율적 전송률 분배를 위한 자원 할당)

  • Han, Seung-Youp;Oh, Eun-Sung;Han, Myeong-Su;Hong, Dae-Sik
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.45 no.1
    • /
    • pp.59-65
    • /
    • 2008
  • In this paper, a new adaptive resource allocation scheme is proposed in orthogonal frequency-division multiple access(OFDMA) systems with rate proportionality constraints. The problem of maximizing the overall system capacity with constraints on bit error rate, total transmission power and rate-proportionality for user requiring different classes of service is formulated. Since the optimal solution to the constrained fairness problem is extremely complex to obtain, a low-complexity suboptimal algorithm that separates subchannel allocation and power allocation is proposed. Firstly, the number of subchannels to be assigned to each user is determined based on the users' average signal-to-noise ratio and rate-proportion. Subchannels are subsequently distributed according to the modified max-min criterion. Lastly, based on the subchannel allocation, the optimal power allocation by solving the Language dual problem is proposed. Additionally, in order to reduce the computational complexity, iterative rate proportionality tracking algorithm is proposed for maximizing the capacity together with maintaining the rate proportionality constraint.

BER performance analysis of successive interference cancellation(SIC) algorithm for W-CDMA HSDPA receiver (W-CDMA HSDPA수신기의 직렬간섭제거 알고리즘의 오류율 성능해석)

  • Koo Je-Gil
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.41 no.1
    • /
    • pp.13-22
    • /
    • 2004
  • This paper drives the exact expression of bit error rate(BER) performance for successive interference cancellation(SIC) algorithm against multipath interference components in a high-speed downlink packet access(HSDPA) system of W-CDMA downlink and the BER performance is evaluated by numerical analysis. Numerical results showed that the average BER performance is rapidly saturated in terms of increasing the number of multipath and is revealed significant improvement for improvement Processing gain(PG). For example, the average BER Performance of the SIC algorithm is superior to the performance of conventional scheme by more than 7dB and 1.4dB for processing gain PG=54 and 128 under the two-path channel and average BER=$1.0{\times}10^{-3}$, respectively. This results also indicated that the average BER saturation is occurred at nearly one weight factor which is assigned to pilot and data channels. Likewise, the average BER performance is greatly degraded due to increasing the interference power in proportional to the number of multipath with increasing multicode K. And the smaller multipath fading channel gain is arrived later, the more the average BER performance is improved. The results of performance analysis in this paper indicated that the multipath interference cancellation is required to improve the BER performance in a HSDPA system under multicode for high-speed packet transmission, low spreading factor, and multipath fading channel.

Minimal Sampling Rate for Quasi-Memoryless Power Amplifiers (전력증폭기 모델링을 위한 최소 샘플링 주파수 연구)

  • Park, Young-Cheol
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.44 no.10
    • /
    • pp.185-190
    • /
    • 2007
  • In this paper, minimum sampling rates and method of nonlinear characterization were suggested for low power, quasi-memoryless PAs. So far, the Nyquist rate of the input signal has been used for nonlinear PA modeling, and it is burdening Analog-to-digital converters for wideband signals. This paper shows that the input Nyquist rate sampling is not a necessary condition for successful modeling of quasi-memoryless PAs. Since this sampling requirement relives the bandwidth requirements for Analog-to-digital converters (ADCs) for feedback paths in digital pre-distortion systems, relatively low-cost ADcs can be used to identify nonlinear PAs for wideband signal transmission, even at severe aliasing conditions. Simulation results show that a generic memoryless nonlinear RF power amplifier with AMAM and AMPM distortion can be successfully identified at any sampling rates. Measurement results show the modeling error variation is less than 0.8dB over any sampling rates.