• 한국정보통신설비학회:학술대회논문집
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• 2008.08a
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• pp.102-106
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• 2008

Forensic Marking is the technology that enables the service providers (SP) to identify the illegal digital contents distributors by first inserting markings (data indicating the user information and playback time) in realtime into the digital contents at time of playback of digital contents, and then later by extracting inserted markings from the contents which are illegally captured from the multimedia device such as IPTV STBs and distributed over the Internet. Digital Rights Management (DRM), which is a very popular content protection technology, has the security hole that can be vulnerable because the encrypted digital contents are transformed into their original plaintext forms after the decrypting process on the STBs. Therefore Forensic Marking (FM) has now become a companion content protection solution to DRM. This article describes a new way of tracking up to 4 illegal content users in FM implementation using the blue-difference chroma component of YCbCr color space. This FM technology has many advantages like fast processing time and easy portability to STB devices compared to that of the traditional watermarking processing in the frequency domain.

• Journal of Broadcast Engineering
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• v.9 no.4 s.25
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• pp.357-370
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• 2004

In this paper we propose Digital Signal Processing (DSP) techniques for the Equalization Digital On-Channel Repeater(EDOCR) in the ATSC digital TV (DTV) System. DSP techniques consist of demodulation. baseband equalization, and remodulation. Since the time delay caused by signal processing in the EDOCR can seriously affect the performance of ATSC legacy receivers, it is required that the processing time should be minimized as much as possible. To achieve this goal, we focus on the reduction of the EDOCR's time delay with the minimization of its performance degradation. In addition, we present recommended proper parameters for hardware implementation based on extensive simulation result.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.3
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• pp.93-98
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• 2003

With the improvement of digital signal processors, digital pulse compressor(DPC) is widely used in radar systems. The DPC can be implemented by using FIR filter algorithm in time domain or FFT algorithm in frequency domain. This paper designs an expansible DPC using multiple DSPs. With ADSP-21060 of Analog Devices Inc., the computation time as a function of the number of received range cells and FIR filter tap is compared and analyzed in time domain using C-language and assembly language. therefore, when radar system parameters are determined, the number of DSP's required to implement DPC can be easily estimated.

• 한국정보통신설비학회:학술대회논문집
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• 2007.08a
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• pp.142-146
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• 2007

Digital Rights Management (DRM) technology has been widely used for protecting the digital contents over the recent years. But the digital contents protected by DRM are vulnerable to various video memory capture programs when DRM packaged contents are decrypted on the consumers' multimedia devices. To make up for this kind of DRM security holes the Forensic Marking (FM) technology is being deployed into the content protection area. Most leading DRM companies as well as big electronics companies like Thomson and Philips already have commercial FM solutions. Forensic Marking technology uses the digital watermarking to insert the user information such as user id, content playing time and etc. into the decrypted and decoded content at the playback time on the consumer devices. When the content containing watermarked user information (Forensic Mark) is illegally captured and distributed over the Internet, the FM detection system takes out the inserted FM from the illegal contents and informs contents service providers of the illegal hacker's information. In this paper the requirements and test conditions are discussed for the commercial Forensic Marking systems.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.3
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• pp.577-582
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• 2016

The synchronous TDC(Time-to-Digital Converter) of counter-type using current-conveyor is designed by $0.18{\mu}m$ CMOS process and the supply voltage is 3 volts. In order to compensate the disadvantage of a asynchronous TDC the clock is generated when the start signal is applied and the clock is synchronized with the start signal. In the asynchronous TDC the error range of digital output is from $-T_{CK}$ to $T_{CK}$. But the error range of digital output is from 0 to $T_{CK}$ in the synchronous TDC. The error range of output is reduced by the synchronization between the start signal and the clock when the timing-interval signal is converted to digital value. Also the structure of the synchronous TDC is simple because there is no the high frequency external clock. The operation of designed TDC is confirmed by the HSPICE simulation.

• Journal of the Korean Society for Precision Engineering
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• v.10 no.4
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• pp.7-15
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• 1993

This paper introduces a new concept to analyze the digital control system where the continuous-time plant is stabilized by the digital controller with sampler and hodl. It gives some methods to handle the inter-sampling behavior which has not been considered in the digital controller design. Also, the new trend and future direction in digital control are introduced.

• KDI Journal of Economic Policy
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• v.45 no.2
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• pp.21-50
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• 2023

In this paper, I empirically estimate the relationship between digital technology and climate technology using the United States Patent and Trademark Office's patent database. I find that innovation in digital technology increases the number of patents for climate technology by 17.3% on average, with digital data-processing technology and machine-learning-related technologies especially playing a key role in this relationship. Designing and implementing detailed policies that take into account the relationship between the two technologies will help us reduce the time required to achieve carbon neutrality and shift to the digital economy.

• Proceedings of the KIEE Conference
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• 2006.04a
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• pp.276-278
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• 2006

In this paper, a complete solution to fuzzy-model-based digital redesign problem (IDR) for sampled-data nonlinear systems is presented, The term of intelligent digital redesign (IDR) is to design a digital fuzzy controller such that the sampled-data closed-loop fuzzy system is equivalent to the continuous-time closed-loop fuzzy system using the state matching, Its solution is simply obtained by linear transformation, Under the proposed sampled-data controller, the states of the sampled-data and continuous-time fuzzy system are completely matched at every sampling points.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.8 no.1
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• pp.65-75
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• 1996

A pilot plant, which is simplified the hot water heating control system of a large scale residential building, is used to investigate the effects of control methods and operating conditions on the system performance and to compare control characteristics. Digital variable structure controller(DVSC) and digital PI controller are implemented to control the speed of the circulating pump for the pilot plant using PC. For the DVSC, a control algorithm is suggested, which using a nonlinear sliding surface and a PID sliding surface outside and inside of output error boundary layer, respectively. Smith predictor algorithm is used for the compensation of long dead time. The suggested DVSC yields improved control performance compared with existing DVSC using linear sliding surface only. the system responses with the suggested DVSC shows good responses without overshoot for various operating conditions and robust under external disturbances compared with digital PI controller.

• ETRI Journal
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• v.37 no.3
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• pp.573-583
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• 2015

We introduce the idea of a forward-secure undetachable digital signature (FS-UDS) in this paper, which enables mobile agents to generate undetachable digital signatures with forward security of the original signer's signing key. The definition and security notion of an FS-UDS scheme are given. Then, the construction of a concrete FS-UDS scheme is proposed; and the proof of security for the proposed scheme is also provided. In the proposed scheme, mobile agents need not carry the signing key when they generate digital signatures on behalf of the original signer, so the signing key will not be compromised. At the same time, the encrypted function is combined with the original signer's requirement; therefore, misuse of the signing algorithm can be prevented. Furthermore, in the case where a hacker has accessed the signing key of the original signer, he/she is not able to forge a signature for any time period prior to when the key was obtained.