• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.6
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• pp.732-741
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• 2018

In order to maximize the usable capacity of a BMS (battery management system) that uses several battery cells connected in series, a cell balancing technique that equips each cell with the same voltage is needed. In the active cell balancing circuit using a multi-winding transformer, a balancing circuit that transfers energy directly to the cell (cell-to-cell) is composed of a PMOS switch and a gate driving chip for driving the NMOS switch. The TLP2748 photocoupler and the TLP2745 photocoupler are required, resulting in increased cost and reduced integration. In this paper, instead of driving PMOS and NMOS switching devices by using photocoupler, we proposed 70V BCD process based PMOS gate driving circuit, NMOS gate driving circuit, PMOS gate driving circuit and NMOS gate driving circuit with improved switching time. ${\Delta}t$ of the PMOS gate drive switch with improved switching time was 8.9 ns and ${\Delta}t$ of the NMOS gate drive switch was 9.9 ns.

• Journal of Electrical Engineering and Technology
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• v.11 no.6
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• pp.1674-1683
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• 2016

In this paper, a Finite Control Set Model Predictive Control (FCS-MPC) for a five level cascaded multilevel inverter (CMLI) with reduced switch topology is proposed. Five switches are used here instead of conventionally used eight switches. The main contribution of this paper is to make the MPC controller work for the reduced switch topology using only 19 voltage vectors in place of conventional 61 voltage vectors for a five level CMLI. This simplifies the execution of the MPC algorithm, paving a way for the significant reduction in the computational time. The controller makes use of the excellent ability of MPC to multitask, by adding one more objective which is to reduce the average switching frequency in addition to controlling the load current. This is especially important, since switching losses and therefore switching frequency is significant for high-power applications. The trade-off of this MPC is that the current is not as smooth as the 61 vector scheme, but well within the limits of IEEE standards. The results shown prove that this MPC works well in steady state and dynamic conditions too.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.256-260
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• 2001

This paper presents boost and buck and buck-boost DC-DC converter circuit topologies of high-frequency soft switching transition PWM chopper type DC-DC high power converters with a single auxiliary passive resonant snubber. In the proposed boost power converter circuits operating under a principle of ZCS turn-on and ZVS turn-off commutation schemes, the capacitor and inductor in the auxiliary passive resonant circuit works as the loss less resonant snubber. In addition to this, the switching voltage and current peak stresses as well as EMI and RFI noises can be basically reduced by this single passive resonant snubber. Moreover, it is proved that converter circuit topologies with a passive resonant snubber are capable of solving some problems of the conventional hard switching PWM processing based on high-ferquency pulse modulation operation principle. The simulation results of this converter are discussed as compared with the experimental ones. The effectiveness of this power converter with a single passive resonant snubber is verified by the 5kW experimental breadboad set up.

• Journal of the Korea Society of Computer and Information
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• v.11 no.5 s.43
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• pp.231-239
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• 2006

For such large-scale software as for operating a switching system, the use of real-time databases is essential for data exchanges among various functions and their data processing. Under the environment of developing the DBMS software for a switching system, the application program including database manipulations is first developed on a host computer and then the developed program is loaded into a switching system for its tests. To make it possible for DBMS manipulation software to be developed on a host computer rather than a switching system itself, we developed a host-based DBMS simulation system(HDBMS). In this paper we presented the roles and functions of HDBMS, its system structure, and the technical details for implementing HDBMS.

• Journal of the Korean Institute of Intelligent Systems
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• v.11 no.9
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• pp.793-800
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• 2001

This paper deals with a new design methodology for a switching-type fuzzy-model-based controller in continuous and discrete-time system. Takagi-Sugeno (TS) fuzzy model is employed to design the switching-type fuzzy-model-based controller. A switching-type fuzzy-model-based controller is constructed based on the spirit of “divide and conquer”. The global system which has several rules in divided into several subsystems and then, a solution is found at each subsystem. The global solution is determined by a conjunction of the solutions of each subsystem. The design conditions are formulated in terns of linear matrix inequalities (LMIs), which guarantee the stabilization of a given TS fuzzy system. Simulation examples are included for ensuring the proposed control method.

• Nuclear Engineering and Technology
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• v.49 no.1
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• pp.209-215
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• 2017

Fast neutron irradiation was used to improve the switching speed of a 600-V nonpunch-through insulated gate bipolar transistor. Fast neutron irradiation was carried out at 30-MeV energy in doses of $1{\times}10^8n/cm^2$, $1{\times}10^9n/cm^2$, $1{\times}10^{10}n/cm^2$, and $1{\times}10^{11}n/cm^2$. Electrical characteristics such as current-voltage, forward on-state voltage drop, and switching speed of the device were analyzed and compared with those prior to irradiation. The on-state voltage drop of the initial devices prior to irradiation was 2.08 V, which increased to 2.10 V, 2.20 V, 2.3 V, and 2.4 V, respectively, depending on the irradiation dose. This effect arises because of the lattice defects generated by the fast neutrons. In particular, the turnoff delay time was reduced to 92 nanoseconds, 45% of that prior to irradiation, which means there is a substantial improvement in the switching speed of the device.

• Industrial Engineering and Management Systems
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• v.11 no.1
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• pp.48-53
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• 2012

Due to the customer needs of reducing cost and delivery date shorting, prompt change in the production plan became more important. In the multi period system (For instance, production line.) where target processing time exists, production, idle and delay risks occur repeatedly for multiple periods. In such situations, delay of one process may influence the delivery date of an entire process. In this paper, we discuss the minimum expected cost of the case mentioned above, where the risk depends on the previous situation and occurs repeatedly for multiple periods. This paper considers the optimal switching frequency to minimize the total expected cost of the production process. In this paper, first, the optimal switching frequency model is proposed. Next, the mathematic formulation of the total expectation is presented. Finally, the policy of optimal switching frequency is investigated by numerical experiments.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.9 no.10
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• pp.3921-3944
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• 2015

Currently Energy-Saving (ES) methods in cellular networks could be improved, as compensation method for irregular Base Station (BS) deployment is not effective, most regional ES algorithm is complex, and performance decline caused by ES action is not evaluated well. To resolve above issues, a low-complexity energy efficient BS cooperation mechanism for Long Time Evolution (LTE) networks is proposed. The mechanism firstly models the ES optimization problem with coverage, resource, power and Quality of Service (QoS) constraints. To resolve the problem with low complexity, it is decomposed into two sub-problems: BS Mode Determination (BMD) problem and User Association Optimization (UAO) problem. To resolve BMD, regional dynamic multi-stage algorithms with BS cooperation pair taking account of load and geographic topology is analyzed. And then a distributed heuristic algorithm guaranteeing user QoS is adopted to resolve UAO. The mechanism is simulated under four LTE scenarios. Comparing to other algorithms, results show that the mechanism can obtain better energy efficiency with acceptable coverage, throughput, and QoS performance.

• Journal of Semiconductor Engineering
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• v.3 no.2
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• pp.161-167
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• 2022

Electrical characteristics of LDMOS power device with LDD(Lightly Doped Drain) structure is studied with variation of the region of channel and LDD. The channel in LDMOSFET encloses a junction-type source and is believed to be an important parameter for determining the circuit operation of CMOS inverter. Two-dimensional TCAD MEDICI simulation is used to study hot-carrier effect, on-resistance Ron, breakdown voltage, and transient switching characteristic. The voltage-transfer characteristics and on-off switching properties are studied as a function of the channel length and doping levels. The digital logic levels of the output and input voltages are analyzed from the transfer curves and circuit operation. Study indicates that drain current significantly depends on the channel length rather than the LDD region, while the switching transient time is almost independent of the channel length. The high and low logic levels of the input voltage showed a strong dependency on the channel length, while the lateral substrate resistance from a latch-up path in the CMOS inverter was comparable to that of a typical CMOS inverter with a guard ring.

• Journal of Korean Institute of Industrial Engineers
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• v.36 no.2
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• pp.138-145
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• 2010

In this paper, we consider the information processing system, which organizes the collected data to meaningful information when the number of data collected from multiple sources reaches to a predetermined number, and performs any action by processing the collected data, or transmits to other devices or systems. We derive an analytical model to calculate the time until it takes to process information after starting to collect data. Therefore, in order to complete the processing data within certain time constraints, we develop some design criteria to control various parameters of the information processing system. Also, we analyze the discrete time model for packet switching networks considering data with no particular arrival nor drop pattern. We analyze the relationship between the number of required packets and average information processing time through numerical examples. By this, we show that the proposed model is able to design the system to be suitable for user's requirements being complementary the quality of information and the information processing time in the system with time constraints.