• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.5
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• pp.232-242
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• 2002

In a MPLS(Multiprotocol Label Switching) network, it is important to reduce the number of labels and LSP(Lable Switched Path)s for network resource management. MTP(Multipoint-to-Point) LSP can be used to solve this problem. In consideration of traffic engineering, MTP LSP must be chosen to enhance the availability of network and link utilization. Also, a fast mechanism to setup MTP LSPs is required for rerouting capability against link failure. In this paper, we propose a fast MTP LSP traffic engineering of multipath MTP LSP by using a mapping of a MTP LSP upon Diffserv PHBs(Per Hop Behavior) in a Diffserv-capable MPLS network. In the proposed traffic engineering, we determine multiple MTP LSPs in a hierarchical manner according to the characteristics of different services. By using Monte-Carlo method for traffic load balancing process, it provides fast rerouting capability in case of frequent link failure across large network. Out method produces to be nearly optimal within reasonable run-times. It's time complexity is in O( Cn$^2$logn) as conventional multipath routing and it is much faster than Linear Programming approach. Simulation results show that the proposed traffic engineering can be controlled effectively in an administrative manner and enhance the availability of network in comparison with conventional multipath routing.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.42 no.1
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• pp.181-192
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• 2017

Recently, many researches are carried out for Advanced Driver Assistant Systems(ADAS). Especially, many studies are carried out to analyze the road situation using road images. In order to improve the performance of the road situation analysis, it is necessary to acquire images with appropriate exposure time. In this paper, we design and implement multi exposure smart vehicular camera which provides road traffic information to driver. Proposed device can acquire road traffic information by on-board camera and various sensors. And we propose an auto exposure control algorithm for the road environment to increase accuracy of image recognition. In addition, we also propose the switching ROI method that apply existing ROI techniques to overcome a limited computation power of embedded devices. We developed prototype of multi exposure smart vehicular camera and performed experiments to evaluate proposed auto exposure control algorithm and switching ROI method. The results show that the average accuracy of image recognition increased by 13.45%.

• Korean Journal of Optics and Photonics
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• v.17 no.6
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• pp.556-563
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• 2006

We present a comprehensive study of a chirped pulse Ti:sapphire regenerative amplifier system operating at 1 kHz. Main constituents of the system are described in detail. The amplifier stage was first converted to a repetition rate-tunable kHz gain-switched nanosecond Ti:sapphire laser. Operation characteristics at different repetition rates such as build-up times of laser pulses, pump power-dependent output powers and pulse durations, damage thresholds, and tunability ranges were studied. Based on the results achieved, the switching time of the Pocket's cell used and the round trip numbers in the regenerative amplifier were optimized at 1 kHz. The output pulses with a pulse width of 50fs from a home-made Ken lens mode-locked Ti:sapphire oscillator were used as seed pulses. The pulses were expanded to 120ps in a grating stretcher prior to coupling into the 3-mirror amplifier cavity. After amplification and recompression, a stable 1kHz Ti:sapphire regenerative amplifier system, which delivers 85-fs, $320-{\mu}J$ pulses, was fully constructed.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.9
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• pp.71-80
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• 2007

This paper presents a new push-push VCO technique that extracts a second harmonic output signal from a capacitive commonnode in a negativegm oscillator topology. The generation of the $2^{nd}$ harmonics is accounted for by the nonlinear current-voltage characteristic of the emitter-base junction diode causing; 1) significant voltage clipping and 2) different rising and falling time during the switching operation of core transistors. Comparative investigations show the technique is more power efficient in the high-frequency region that a conventional push-push technique using an emitter common node. Prototype 12GHz and 17GHz MMIC VCO were realized in GaInP/GaAs HBT technology. They have shown nominal output power of -4.3dBm and -5dBm, phase noise of -108 dBc/Hz and -110.4 dBc/Hz at 1MHz offset, respectively. The phase noise results are also equivalent to a VCO figure-of-merit of -175.8 dBc/Hz and -184.3 dBc/Hz, while dissipate 25.68mW(10.7mA/2.4V) and 13.14mW(4.38mA/3.0V), respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.2B
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• pp.117-128
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• 2006

For the legacy IEEE 802.15.3 WPAN protocol, an unpredictable piconet coordinator(PNC) leaving from a piconet without a proper handoff procedure causes an absence of PNC, and thus the piconet gets collapsed. In addition, several beacons from PNCs in adjacent piconets may be collided on a device(DEV) located between those piconets. This beacon collision eventually makes the DEV leave from the piconet. To remedy these two problems, we here propose an Active Seamless Coordinator Switching(ASCS) scheme and a PNC HB based Beacon Alignment(PHBA) one. In the ASCS scheme, a PNC assigns a number of DEVs as next possible PNCs in sequence for provisioning against the abrupt breakdown of the current active PNC. Each nominated DEV proactively sends a probe frame to confirm the operation status of the active PNC. For the case of no response from the PNC, the nominated DEV tries to become a new PNC immediately. In the second PHBA scheme, each PNC is allow to broadcast a special Heart Beat(HB) frame randomly during a superframe period. When a DEV receives a HB frame from other PNC, it promptly sends the related PNCs a special Hiccup Beat(HCB) frame with the superframe information of its associated PNC. As a result, the HCB frame makes both PNCs align their superframe beginning time in order to yield no more beacon collisions. For these two proposed schemes, we show the performance by simulations. We can confirm the enhancement of throughput for each superframe and average frame transfer delay, since each scheme can reduce the duration of piconet collapse. Finally, it is worth while to note that the proposed schemes can be operated with frames those are permitted in the legacy WPAN standard.

• The KIPS Transactions:PartC
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• v.9C no.1
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• pp.123-134
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• 2002

The requirement for QoS (Quality of Service) has become an important Issue as real-time or high bandwidth services are increasing, such as Internet Telephony, Internet broadcasting, and multimedia service etc. In order to guarantee the QoS of Internet application services, several approaches are being sought including IntServ (Integrated Service) DiffServ(Differentiated Srvices), and MPLS(Multi-Protocol Label Switching). In this paper, we describe the performance analysis of QoS guarantee mechanism using the DiffServ. To analyze how the DiffServ performance was affected by diverse input traffic models and the weight value in WFQ(Weighted Fair Queueing), we simulated and performed performance evaluation under a random, bursty, and self-similar input traffic models and for diverse input parameters. leased on the results of performance analysis, it was confirmed that significant difference exist in packet delay and loss depending on the input traffic models used. However, it was revealed that QoS guarantee is possible to the EF (expedited Forwarding) class and the service separation between RF and BE (Best Effort) classes may also be achieved. Next, we discussed the performance synthesis problem. (i. e. derived the conservation laws for a DiffServ networks, and analysed the performance variation and dynamic behavior based on the resource allocation (i.e., weight value) in WFQ.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.11
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• pp.66-76
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• 2009

The motion estimation in video encoding system occupies the biggest part. So, we require the motion estimator with efficient structure for real-time operation. And for motion estimator's implementation, it is desired to design hardware module of an exclusive use that perform the encoding process at high speed. This paper proposes motion estimation detection block(MED), 41 SADs(Sum of Absolute Difference) calculation block, minimum SAD calculation and motion vector generation block based on parallel processing. The parallel processing can reduce effectively the amount of the operation. The minimum SAD calculation and MED block uses the pre-computation technique for reducing switching activity of the input signal. It results in high-speed operation. The MED and 41 SADs calculation blocks are composed of adder tree which causes the problem of critical path. So, the structure of adder tree has changed the most commonly used ripple carry adder(RCA) with carry skip adder(CSA). It enables adder tree to operate at high speed. In addition, as we enabled to easily control key variables such as control signal of search range from the outside, the efficiency of hardware structure increased. Simulation and FPGA verification results show that the delay of MED block generating the critical path at the motion estimator is reduced about 19.89% than the conventional strukcture.

• Analytical Science and Technology
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• v.19 no.5
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• pp.383-388
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• 2006

Simple post-wash method by ion chromatography (IC) was established for the rapid and precise determination of fluoride ion in wastewater from mine in fluorite mineralized area. High sulfate in sample was retained in a pre-column and less strongly held fluoride ion was transferred to the principal separation system using modified conventional IC with switching technique. An analytical column with high capacity (AS 9 HC) was used as a pre-column to retain the amount of high sulfate. A guard column (AG 14) as a separation column was used to increase the response of fluoride and reduce the system pressure. According to the recovery of fluoride ion with one detector and the observation of sulfate peak with another conductivity detector, the optimum switching time of 10-port chromatographic injector was 4.3 min. The limit of detection (S/N = 3) of fluoride in synthetic solution containing $500mg\;L^{-1}$ sulfate was $2.4{\mu}g/L$, with $25{\mu}L$ sample volume.

• The Transactions of the Korea Information Processing Society
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• v.2 no.6
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• pp.985-994
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• 1995

In this paper, we propose two hot standby architectures which not only provide high system availability but also lose little data on fault occurrence. In order to evaluate the performance of the proposed hot standby architectures, the warm standby architecture. In order to evaluate the performance of the propose d hot standby architectures, the warm standby architecture which is made from the hot standby architecture by eliminating its synchronization unit is considered. After system unavailability for each architecture is computed by using the corresponding Markov state diagram, the results are compared and evaluated. As the results, in most cases, hot standby architectures have higher availability than warm standby architecture. Also, hot standby architecture with external synchronization unit always maintains a little higher availability than hot standby architecture with internal synchronization unit. Active set time and personnel recovery rate for each architecture have little effect on system availability. However, in the case that data recovery time is too long, system availabilities of hot standby architectures and warm standby architecture degrade rapidly. In this case, the performance degradation of hot standby architectures is severe, and system availabilities of hot standby architectures eventually become lower than system availability of warm standby architecture.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.8
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• pp.128-135
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• 2013

This paper presents a high dimming ratio Power-LED driver IC with high power which is capable of controlling LEDs. In order to accomplish a high dimming ratio LED driver, the preloading inductor current methodology is proposed for the power stage of the proposed method to achieve the fast transient response time during the Power-LED load switching. The information containing the current flowing on the LEDs can be utilized to predict the amount of the current on the inductor. The minimum LED current rising time of existing high dimming ratio Power-LED driver is limited by $3{\mu}s$, however that of the proposed high dimming ratio Power-LED driver is reduced about 1/10. The LED driver is implemented with 0.35um 60V BCDMOS 2-poly 4-metal process. The measurement results show that the proposed LED driver system features the minimum rising time as small as 240ns at the dimming frequency of 1KHz with a 12V of input voltage, nine white LEDs and 353mA of LED current. The LED rising time and power conversion efficiency of the chip are measured to be 240ns and 93.72%, respectively.