• Title/Summary/Keyword: time-switching

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Bus Reconfiguration Strategy Based on Local Minimum Tree Search for the Event Processing of Automated Distribution Substations

  • Ko Yun-Seok
    • KIEE International Transactions on Power Engineering
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    • v.5A no.2
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    • pp.177-185
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    • 2005
  • This paper proposes an expert system that can enhance the accuracy of real-time bus reconfiguration strategy by adopting the local minimum tree search method and that can minimize the spreading effect of the fault by considering the operating condition when a main transformer fault occurs in an automated substation. The local minimum tree search method is used to expand the best-first search method. This method has the advantage that it can improve the solution performance within the limits of the real-time condition. The inference strategy proposed expert system consists of two stages. The first stage determines the switching candidate set by searching possible switching candidates starting from the main transformer or busbar related to the event. The second stage determines the rational real-time bus reconfiguration strategy based on heuristic rules from the obtained switching candidate set. Also, this paper proposes generalized distribution substation modeling using graph theory, and a substation database based on the study results is designed.

The Computer Simulation on the Characteristics of the Non-Inductive Superconducting Fault Current Limiter (무유도성 초전도전류제한기의 특성 해석 및 컴퓨터 시뮬레이션)

  • 주민석;이상진;오윤상;고태국
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.43 no.7
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    • pp.1050-1060
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    • 1994
  • This paper is a study on the computer simulation of the characteristics of the superconducting fault current limiter. Input variable parameters are apparent power, load resistance value, line resistance value and so on. Initial fault current 2 times larger than the trigger current is required to reduce the switching time of SFCL. The propagation velocity increases abruptly, the transport current is several times larger than the ciritical current. In this paper, the switching time is calculated to be 323$\mu$ sec, and the initial fault current is 19 times larger than the critical current. Because the trigger coils are bifilar winding, they have little impedance in superconducting state. After fault occurred, the limiting coil acts as a superconducting reactor and the trigger coils quench at a critical current. Without the SFCL in the circuit, fault current after the load impedence is shorted might be increased to 1100A. The fault current is, therefore, successfully limited by the superconducting limiting coil to 100A determined by the coil inductance.

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A Study on the Blocking Probabilities of Single-buffered switching Networks with Time Slot Sequence Integrity of Multi-slot Calls (다중스롯호의 타임스롯 순서제어를 고려한 단일 버퍼 스위치의 호손율 특성에 관한 연구)

  • 성단근;정민영;강기원
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.16 no.12
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    • pp.1300-1312
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    • 1991
  • In this paper we syudy the time slot sequence integrity(TSSI) of multi-slot calls in the single-buffered switching networks and analyze their traffic characteristics in terms of traffic mixture ratio, number of random searches for idle time slots, and their blocking probablities. This result can be utilized in the design of wideband switching networks in the single buffered systems, such as TDX IA/B swithcing systems, for accommodating multi slot calls.

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A CMOS Hysteretic DC-DC Buck Converter with a Constant Switching Frequency

  • Jeong, Taejin;Yoon, Kwang S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.4
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    • pp.471-476
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    • 2015
  • This paper describes a CMOS hysteretic DC-DC buck converter with a constant switching frequency for mobile applications. The inherent problems of a large output ripple voltage that the conventional hysteretic DC-DC buck converters has faced have been resolved by using the proposed DC-DC buck converter which employed a ramp generator circuit to be able to increase a switching frequency. The proposed architecture enables the settling response time of charge pump circuit within the converter to become less than 6us suitable for mobile applications. The proposed DC-DC buck converter was implemented by using 0.35 um BCDMOS process and die size was $1.37mm{\times}1.37mm$. The measurement results showed that the proposed circuit received the input of 3.7 V and generated output of 1.2 V with the output ripple voltages less than 20 mV under load currents of 100~400 mA at the fixed switching frequency of 2 MHz. The maximum efficiency of the proposed hysteretic buck converter was measured to be around 93%.

New Modeling of Switching Devices Considering Power Loss in Electromagnetic Transients Program Simulation

  • Kim, Seung-Tak;Park, Jung-Wook;Baek, Seung-Mook
    • Journal of Electrical Engineering and Technology
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    • v.11 no.3
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    • pp.592-601
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    • 2016
  • This paper presents the modeling of insulated-gate bipolar transistor (IGBT) in electromagnetic transients program (EMTP) simulation for the reliable calculation of switching and conduction losses. The conventional approach considering the physical property of switching devices requires many attribute parameters and large computation efforts. In contrast, the proposed method uses the curve fitting and interpolation techniques based on typical switching waveforms and a user-defined component with variable resistances to capture the dynamic characteristics of IGBTs. Therefore, the simulation time can be efficiently reduced without losing the accuracy while avoiding the extremely small time step, which is required in simulation by the conventional method. The EMTP based simulation includes turn-on and turn-off transients of IGBT, saturation state, forward voltage of free-wheeling diode, and reverse recovery characteristics, etc. The effectiveness of proposed modeling for the EMTP simulation is verified by the comparison with experimental results obtained from practical implementation in hardware.

A Study on New Current Controller for 7-Phase BLDC Motor Drive System (7상 BLDC 전동기 구동시스템을 위한 새로운 전류제어기에 관한 연구)

  • Lee, Surk;Jeon, Ywun-Seok;Mok, Hyung-Soo;Kim, Duk-Keun
    • The Transactions of the Korean Institute of Power Electronics
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    • v.6 no.2
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    • pp.191-201
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    • 2001
  • Recently, the demand of motor for industrial, household machinery is increasing. As Switching devices and control technology are progressing, so the use of BLDC Motor is increasing. But 3-Phase BLDC Motor generally used has pulsating torque and speed variation in commutation, so the range of its application is limited to high speed operation. Especially, to solve these problems, it is necessary to increase phase of Motor, so study of Poly-Phase BLDC Motor is progressing. However, when hysteresis current controller is used, switching frequency is highly increasing. In this paper, 7-Phase BLDC Motor drive system is designed. Also MSTC(Minimum Switching Time Controller) is proposed and with simulation and experiment, there validities are verified.

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Impact of Interface Charges on the Transient Characteristics of 4H-SiC DMOSFETs

  • Kang, Min-Seok;Bahng, Wook;Kim, Nam-Kyun;Ha, Jae-Geun;Koh, Jung-Hyuk;Koo, Sang-Mo
    • Journal of Electrical Engineering and Technology
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    • v.7 no.2
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    • pp.236-239
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    • 2012
  • In this paper, we study the transient characteristics of 4H-SiC DMOSFETs with different interface charges to improve the turn-on rising time. A physics-based two-dimensional mixed device and circuit simulator was used to understand the relationship between the switching characteristics and the physical device structures. As the $SiO_2$/SiC interface charge increases, the current density is reduced and the switching time is increased, which is due primarily to the lowered channel mobility. The result of the switching performance is shown as a function of the gate-to-source capacitance and the channel resistance. The results show that the switching performance of the 4H-SiC DMOSFET is sensitive to the channel resistance that is affected by the interface charge variations, which suggests that it is essential to reduce the interface charge densities in order to improve the switching speed in 4H-SiC DMOSFETs.

An Implementation of Task Switching and Interrupt Handling Mechanisms of OSEK Operating System based on ARM Processor (ARM 프로세서를 기반으로 한 OSEK 운영체제의 태스크 전환 및 인터럽트 핸들링 메커니즘 구현)

  • Rim, Seong-Rak;Kwon, O-Yong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.4
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    • pp.1947-1953
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    • 2011
  • OSEK/VDX is a joint project aiming at an industry standard for ECUs in vehicles and OSEK OS is a real-time operating system that meets OSEK/VDX specifications. In this paper, we suggest an implementation of task switching and interrupt handling mechanisms of OSEK operating system based on ARM processors. Considering the requirements of OSEK OS and characteristics of ARM processor, we have designed task switching and interrupt handling mechanisms. For evaluating the validation of the suggested mechanisms, we have checked the functional correctness on an experimental embedded board with ARM processor and calculated the time of task switching and interrupt handling.

A Novel 1700V 4H-SiC Double Trench MOSFET Structure for Low Switching Loss (스위칭 손실을 줄인 1700 V 4H-SiC Double Trench MOSFET 구조)

  • Na, Jae-Yeop;Jung, Hang-San;Kim, Kwang-Su
    • Journal of IKEEE
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    • v.25 no.1
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    • pp.15-24
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    • 2021
  • In this paper, 1700 V EPDT (Extended P+ shielding floating gate Double Trench) MOSFET structure, which has a smaller switching time and loss than CDT (Conventional Double Trench) MOSFET, is proposed. The proposed EPDT MOSFET structure extended the P+ shielding area of the source trench in the CDT MOSFET structure and divided the gate into N+ and floating P- polysilicon gate. By comparing the two structures through Sentaurus TCAD simulation, the on-resistance was almost unchanged, but Crss (Gate-Drain Capacitance) decreased by 32.54 % and 65.5 %, when 0 V and 7 V was applied to the gate respectively. Therefore, the switching time and loss were reduced by 45 %, 32.6 % respectively, which shows that switching performance was greatly improved.

Estimating Spot Prices of Restructured Electricity Markets in the United States (미국 전기도매시장의 전기가격 추정)

  • Yoo, Shiyong
    • Environmental and Resource Economics Review
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    • v.13 no.3
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    • pp.417-440
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    • 2004
  • For the behavior of the wholesale spot price, a regime switching model with time-varying transition probabilities was estimated using the data from the PJM (Pennsylvania-New Jersey-Maryland) market. By including the temperature as an explanatory variable in the transition probability equations, the threshold effect of changing regime is clearly enhanced. And hence the predictability of the price spikes was improved. This means that the model showed a very clear threshold effect, with a low probability of switching for low loads and low temperatures and a high probability for high loads and high temperatures. And temperature showed a clearer threshold effect than load does. This implies that weather-related contracts may help to hedge against the risk in the cost of buying electricity during a summer.

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