• Journal of The Korean Society of Agricultural Engineers
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• v.51 no.6
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• pp.53-62
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• 2009

The EFDC (Environmental Fluid Dynamics Code), a numerical model for simulating three-dimensional (3D) flow, transport, and biogeochemical processes in surface water systems including rivers, reservoirs, and estuaries, was applied to assess the effect of sea water and fresh water exchange rates ($Q_e$) on the mixing characteristics of a conservative pollutant (tracer) induced from upstreams and salinity in Saemangeum Lake, Korea. The lake has been closed by a 33 km estuary embankment since last April of 2006, and now seawater enters the lake partially through two sluice gates (Sinsi and Garyuk), which is driving the changes of hydrodynamic and water quality properties of the lake. The EFDC was constructed and calibrated with surveyed bathymetry data and field data including water level, temperature, and salinity in 2008. The model showed good agreement with the field data and adequately replicated the spatial and temporal variations of the variables. The validated model was applied to simulated the tracer and salinity with two different gate operation scenarios: RUN-1 and RUN-2. RUN-1 is the case of real operation condition ($Q_e=25,000,000\;m^3$) of 2008, while RUN-2 assumed full open of Sinsi gate to increase $Q_e$ by $120,000,000\;m^3$. Statistical analysis of the simulation results indicate that mixing characteristics of pollutants from upstream can be significantly affected by the amount of $Q_e$.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.132-135
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• 2011

This paper describes a multi-mode LDPC decoder which supports three block lengths(648, 1296, 1944) and four code rates(1/2, 2/3, 3/4, 5/6) of IEEE 802.11n WLAN standard. To minimize hardware complexity, it adopts a block-serial (partially parallel) architecture based on the layered decoding scheme. A novel memory reduction technique devised using the min-sum decoding algorithm reduces the size of check-node memory by 47% as compared to conventional method. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a $0.18-{\mu}m$ CMOS cell library. It has 219,100 gates and 45,036 bits RAM, and the estimated throughput is about 164~212 Mbps at 50 MHz@2.5v.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.12
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• pp.66-76
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• 1998

In this paper, we implement a buffer capable of handling short loops references to statistically lower the miss rate of variable-length instructions stored in the instruction buffer. MAU(Mark Appending Unit) takes the instructions as they are fetched from external memory, performs some initial decode operations and stores the results of the decode in the buffer for reducing multiple decodes when instructions are executed repeatedly such as in a loop. It includes a decision block of whether hit or not for effectively processing branch instructions Each module of the proposed architecture of processing variable-length instruction is described in VHDL structurally and behaviorally and whether it is working well or not is checked on V-System simulator of Model Technology Inc. We synthesized and simulated the architecture using an ASIC Synthesizer tool with 0.6$\mu\textrm{m}$ 5-Volt CMOS COMPASS library. Operation speed is up to 140MHz. The architecture includes about 17,000 gates.

• Journal of architectural history
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• v.17 no.1
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• pp.65-84
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• 2008

It is generally known that the temple structure in Korea was formalized by the ceremonial principle based on the Buddhist cosmology. But, there have been no concrete studies on how far the two have relationship with each other and what significance it implies in it. In other words, even though the temple structure reflects the Sumeru Mount cosmology which is the Buddhist cosmology, there is still uncertain aspects in the relationship between them. This research is a more concrete approach on what kind of corelation the Sumeru Mount cosmology has with the Korean temple structure. For this, the levels of related documents on the Buddhist cosmology and the Sumeru Mount cosmology have been arranged first. Then, on this basis, it is searched with what symbolism the cosmology has been accepted in the temple structure. The temple is a sacred space that holds Buddha and a profane space which the sattva (ordinary people) can approach at the same time. The site of the temple is also a land that is connected to the residence of sattva and a blissful area of prayer that they can be born again through Buddha at the same time. Thus, the double characteristics of sanctity and profanity are finally inter-connected with each other in the view point of Jinsokburi(Truth and Worldliness are not different), and the temple structure reflects this significance through the symbolism very well. Therefore, the correct recognition on the temple structure can be said as an important aspect to understand the purpose of Buddhism.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.10
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• pp.61-69
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• 2009

This paper presents the design results of a low complexity and high throughput LDPC encoder structure. In order to solve the high complexity problem of the LDPC encoder, a simplified matrix-vector multiplier is proposed instead of the conventional complex matrix-vector multiplier. The proposed encoder also adopts a partially parallel structure and performs column-wise operations in matrix-vector multiplication to achieve high throughput. Implementation results show that the proposed architecture reduces the number of logic gates and memory elements by 37.4% and 56.7%, compared with existing five-stage pipelined architecture. The proposed encoder also supports 800Mbps throughput at 40MHz clock frequency which is improved about three times more than the existing architecture.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.4
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• pp.885-890
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• 2014

This paper has presented the change of subthreshold swings for gate oxide thickness of asymmetric double gate(DG) MOSFET, and solved Poisson equation to obtain the analytical solution of potential distribution. The Gaussian function as doping distribution is used to approch experimental results. The symmetric DGMOSFET is three terminal device. Meanwhile the asymmetric DGMOSFET is four terminal device and can separately determine the bias voltage and oxide thickness for top and bottom gates. As a result to observe the subthreshold swings for the change of top and bottom gate oxide thickness, we know the subthreshold swings are greatly changed for gate oxide thickness. Especially we know the subthreshold swings are increasing with the increase of top and bottom gate oxide thickness, and top gate oxide thickness greatly influences subthreshold swings.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.5A
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• pp.554-565
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• 2004

In this paper, we implement single cycle and multi cycle adders. We can compare area and time by using the implemented adders. The size of adders is 64, 128, 256-bits. The architecture of hybrid adders is that the carry-out of small adder groups can be interconnected by utilizing n carry propagate unit. The size of small adder groups is selected in three formats - 4, 8, 16-bits. These adders were implemented with Verilog HDL with top-down methodology, and they were verified by behavioral model. The verified models were synthesized with a Samsung 0,35(um), 3.3(V) CMOS standard cell library while a using Synopsys Design Compiler. All adders were synthesized with group or ungroup. The optimized adder for a Crypto-processor included Smart Card IC is that a 64-bit RCA based on 16-bit CLA. All small adder groups in this optimized adder were synthesized with group. This adder can operate at a clock speed of 198 MHz and has about 961 gates. All adders can execute operations in this won case conditions of 2.7 V, 85 $^{\circ}C$.

• Water for future
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• v.29 no.2
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• pp.209-219
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• 1996

The existing gate operation rule of Paldang hydroelectric plant has been used since the construction of the dam in 1973 except partial modification due to the construction of Chungju multipurpose dam in 1985. The water level near the downstream of Paldang dam has been lowered about 3 m because of the channel maintenance of Han River development project. Thus, the discharge estimation formula based on the submerged orifice type spillway has to be re-evaluated by considering various patterns of the gate operation rules and lowered channel bed. In this study, three types of gate openings were tested to select the proper gate operation rules through the hydraulic model test for various discharges and opening heights. Also, the numerical analysis has been performed to simulate the flow patterns of downstream. As a result, the gate operation rule, which opens 5 gates each time from the left side, was selected as the proper gate operation rule of Paldang dam.

• Korean Journal of Fisheries and Aquatic Sciences
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• v.47 no.6
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• pp.978-982
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• 2014

A mass mortality of 249 finless porpoises Neophocaena asiaeorientalis occurred in the Saemangeum Dyke in February 2011. It was an extraordinary event, notable due to the death toll and the location of the occurrence, a semi-isolated lake enclosed by a man-made structure. We conducted sighting surveys that consisted of a land-based sighting survey recorded from three different platforms, and a ship-based sighting survey in the lake. The land-based survey was dedicated to clarifying the distribution of finless porpoises and whether they passed through two water gates (Shinsi and Garyek) of the dyke from 2011 to 2013. No finless porpoises were observed in the 2011 or January 2012 surveys. In April 2012, two months and one year after the mass mortality, one finless porpoise, swimming 400 m from the Shinsi water gate, was observed by a land-based survey. The number of observed individuals increased to nine in 2012 and reached 10 by May 2013 at the time of the surveys. Most of the porpoises were detected near the Garyek water gate. The density of the animals was $0.075/km^2$ in 2012 and $0.083/km^2$ in 2013. The density of porpoises was $2.063/km^2$ at the time of the mass mortality.

• Macromolecular Research
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• v.17 no.7
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• pp.528-532
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• 2009

The size and shape of free volume (FV) holes available in membrane materials control the rate of gas diffusion and its permeability. Based on this principle, a segmented, thermo-sensitive polyurethane (TSPU) membrane with functional gate, i.e., the ability to sense and respond to external thermo-stimuli, was synthesized. This smart membrane exhibited close-open characteristics to the size of the FV hole and water vapor permeation and thus can be used as smart food packaging materials. Differential scanning calorimetry (DSC), dynamic mechanical analysis (DMA), positron annihilation lifetimes (PAL) and water vapor permeability (WVP) were used to evaluate how the morphological structure of TSPU and the temperature influence the FV holes size. In DSC and DMA studies, TSPU with a crystalline transition reversible phase showed an obvious phase-separated structure and a phase transition temperature at $53^{\circ}C$ (defined as the switch temperature and used as a functional gate). Moreover, the switch temperature ($T_s$) and the thermal-sensitivity of TSPU remained available after two or three thermal cyclic processes. The PAL study indicated that the FV hole size of TSPU is closely related to the $T_s$. When the temperature varied cyclically from $T_s-10{\circ}C$ to $T_s+10^{\circ}C$, the average radius (R) of the FV holes of the TSPU membrane also shifted cyclically from 0.23 to 0.467 nm, exhibiting an "open-close" feature. As a result, the WVP of the TSPU membrane also shifted cyclically from 4.30 to $8.58\;kg/m^2{\cdot}d$, which produced an "increase-decrease" response to the thermo-stimuli. This phase transition accompanying significant changes in the FV hole size and WVP can be used to develop "smart materials" with functional gates and controllable water vapor permeation, which support the possible applications of TSPU for food packaging.