• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.66-66
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• 1999

최근 들어 다결정 SiGe은 MOS(Metal-Oxide-Semiconductor)에서 기존에 사용되던 다결정 Si 공정과의 호환성 및 여러 장점으로 인하여 다결정 Si 대안으로 많은 연구가 진행되고 있다. 고농도로 도핑된 P type의 다결정 SiGe은 Ge의 함량에 따른 일함수의 조절과 낮은 비저항으로 submicrometer CMOS 공정에서 게이트 전극으로 이용하려는 연구가 진행되고 있으며, 55$0^{\circ}C$ 이하의 낮은 온도에서도 증착이 가능하고, 도펀트의 활성화도가 높아서 TFT(Thin Film Transistor)에서도 유용한 재료로 검토되고 있다. 현재까지 다결정 SiGe의 증착은 MBE, APCVD, RECVD. HV/LPCVD 등 다양한 방법으로 이루어지고 있다. 이중 HV/LPCVD 방법을 이용한 증착은 반도체 공정에서 게이트 전극, 유전체, 금속화 공정 등 다양한 공정에서 사용되고 있는 방법으로 현재 사용되고 있는 반도체 공정과의 호환성의 장점으로 다결정 SiGe 게이트 전극의 증착 공정에 적합하다고 할 수 있다. 본 연구에서는 HV/LPCVD 방법을 이용하여 게이트 전극으로의 활용을 위한 다결정 SiGe의 증착 메카니즘을 분석하고 Ex-situ implantation 후 열처리에 따라 나타나는 활성화 정도를 분석하였다. 도펀트를 첨가하지 않은 다결정 SiGe을 주성엔지니어링의 EUREKA 2000 장비를 이용하여, 1000$\AA$의 열산화막이 덮혀있는 8 in 웨이퍼에 증착하였다. 증착 온도는 55$0^{\circ}C$에서 6$25^{\circ}C$까지 변화를 주었으며, 증착압력은 1mtorr-4mtorr로 유지하였다. 낮은 증착압력으로 인한 증착속도의 감소를 방지하기 위하여 Si source로서 Si2H6를 사용하였으며, Ge의 Source는 수소로 희석된 10% GeH4와 100% GeH4를 사용하였다. 증착된 다결정 SiGe의 Ge 함량은 RBS, XPS로 분석하였으며, 증착된 박막의 두께는 Nanospec과 SEM으로 관찰하였다. 또한 Ge 함량 변화에 따른 morphology 관찰과 변화 관찰을 위하여 AFM, SEM, XRD를 이용하였으며, 이온주입후 열처리 온도에 따른 활성화 정도의 관찰을 위하여 4-point probe와 Hall measurement를 이용하였다. 증착된 다결정 SiGe의 두게를 nanospec과 SEM으로 분석한 결과 Gem이 함량이 적을 때는 높은 온도에서의 증착이 더 빠른 증착속도를 나타내었지만, Ge의 함량이 30% 되었을 때는 온도에 관계없이 일정한 것으로 나타났다. XRD 분석을 한 결과 Peak의 위치가 순수한 Si과 순수한 Ge 사이에 존재하는 것으로 나타났으며, ge 함량이 많아짐에 따라 순수한 Ge쪽으로 옮겨가는 경향을 보였다. SEM, ASFM으로 증착한 다결정 SiGe의 morphology 관찰결과 Ge 함량이 높은 박막의 입계가 다결정 Si의 입계에 비해 훨씬 큰 것으로 나타났으며 근 값도 증가하는 것으로 나타났다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.7
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• pp.394-399
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• 2016

The silicon dioxide ($SiO_2$) was deposited using various gas as oxygen and nitrous oxide ($N_2O$) in nowadays. In order to improve electrical characteristics and the interface state density ($D_{it}$) in low temperature, It was deposited with carbon dioxide ($CO_2$) and silane ($SiH_4$) gas by inductively coupled plasma chemical vapor deposition (ICP-CVD). Each $D_{it}$ of $SiO_2$ using $CO_2$ and $N_2O$ gas was $1.30{\times}10^{10}cm^{-2}{\cdot}eV^{-1}$ and $3.31{\times}10^{10}cm^{-2}{\cdot}eV^{-1}$. It showed $SiO_2$ using $CO_2$ gas was about 2.55 times better than $N_2O$ gas. After 10 years when the thin film was applied to metal/insulator/semiconductor(MIS)-nonvolatile memory(NVM), MIS NVM using $SiO_2$($CO_2$) on tunneling layer had window memory of 2.16 V with 60% retention at bias voltage from +16 V to -19 V. However, MIS NVM applied $SiO_2$($N_2O$) to tunneling layer had 2.48 V with 61% retention at bias voltage from +20 V to -24 V. The results show $SiO_2$ using $CO_2$ decrease the $D_{it}$ and it improves the operating voltage.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.217.2-217.2
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• 2014

We prepared a flexible and transparent CuO/Cu/CuO multilayer electrodes on a polyethylene terephthalate (PET) substrate using a specially designed roll-to-roll sputtering system at room temperature for GFF-type touch screen panels (TSPs). By the continuous roll-to-roll sputtering of the CuO and Cu layer, we fabricated a flexible CuO(150nm)/Cu(150nm)/CuO(150nm) multilayer electrodes with a sheet resistance of $0.289{\Omega}/square$, resistivity of $5.991{\times}10^{-23}{\Omega}-cm$, at the optimized condition without breaking the vacuum. To investigate the feasibility of the CuO/Cu/CuO multilayer as a transparent electrode for GFF-type TSPs, we fabricated simple GFF-type TSPs using the diamond patterned CuO/Cu/CuO electrode on PET substrate as function of mesh line width. Using diamond patterned CuO/Cu/CuO electrode of mesh line $5{\mu}m$ with sheet resistance of 38 Ohm/square, optical transmittance of 90% at 550 nm and an average transmittance of 89% at wavelength range from 380 to 780 nm, we successfully demonstrated GFF-type touch panel screens (TPSs). The successful operation of GFF-type TPSs with CuO/Cu/CuO multilayer electrodes indicates that the CuO/Cu/CuO multilayer is a promising transparent electrode for large-area capacitive-type TPSs due to its low sheet resistance and high transparency.

• Korean Journal of Materials Research
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• v.17 no.3
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• pp.147-151
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• 2007

Cu-free multi-component sol, of which final oxide composition becomes $Bi_{1.9}Pb{0.35}SrCaO,\;Bi_{1.8}Pb_{0.2}SrCaO\;and\;Bi_{1.5}SrCaO$, respectively, was prepared through sol-gel route and coated on a bare Cu substrate. Starting materials were metal-alkoxides as follows.; [$Bi(OC_{2}H_{5})_{3}\;Pb(O^{1}C_{3}H_{7})_{2},\;Sr(O^{i}C_{3}H_{7})_{2},\;Ca(OC_{2}H_{5})_{2}$] as a reagent grade. Transparent light yellowish sol was obtained in the case of $Bi_{1.9}Pb_{0.35}SrCaO\;and\;Bi_{1.8}Pb_{0.2}SrCaO$ composition and $Bi_{1.5}SrCaO$ composition's sol was light greenish. Each sol was repeatedly dip-coated on Cu substrate four times and pre-heated at $400^{\circ}C$ and finally heat-treated in the range of $740{\sim}900^{\circ}C$. In the results, crystalline phases confirmed by XRD were (2201) orthorhombic and monoclinic phases. However, only $Bi_{1.9}Pb_{0.35}SrCaO_{x}$ composition showed pseudo-superconductive behavior after heat-treatment at $900^{\circ}C$ for 12 seconds and then onset temperature was 77 K, even though it did not exhibit zero resistance below Tc.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.758-760
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• 2007

Organic field-effect transistors (OFETs) are of interest for use in widely area electronic applications. We fabricated a copper phthalocyanine (CuPc) based field-effect transistor with different metal electrode. So we need the effect of the substituent group attached to the phthalocyanine on the surface potential was investigated by Kelvin probe method with varying temperature of the substrate. We were obtained the positive shift of the surface potential for CuPc thin film. We observed the electron displacement at the interface between Au electrode and CuPc layer and we were confirmed by the surface potential measurement.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.283-283
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• 2011

The n-doping effect by doping metal carbonate into an electron-injecting organic layer can improve the device performance by the balanced carrier injection because an electron ohmic contact between cathode and an electron-transporting layer, for example, a high current density, a high efficiency, a high luminance, and a low power consumption. In the study, first, we investigated an electron-ohmic property of electron-only device, which has a ITO/$Rb_2CO_3$-doped $C_{60}$/Al structure. Second, we examined the I-V-L characteristics of all-ohmic OLEDs, which are glass/ITO/$MoO_x$-doped NPB (25%, 5 nm)/NPB (63 nm)/$Alq_3$ (32 nm)/$Rb_2CO_3$-doped $C_{60}$(y%, 10 nm)/Al. The $MoO_x$doped NPB and $Rb_2CO_3$-doped fullerene layer were used as the hole-ohmic contact and electron-ohmic contact layer in all-ohmic OLEDs, respectively, Third, the electronic structure of the $Rb_2CO_3$-doped $C_{60}$-doped interfaces were investigated by analyzing photoemission properties, such as x-ray photoemission spectroscopy (XPS), Ultraviolet Photoemission spectroscopy (UPS), and Near-edge x-ray absorption fine structure (NEXAFS) spectroscopy, as a doping concentration at the interfaces of $Rb_2CO_3$-doped fullerene are changed. Finally, the correlation between the device performance in all ohmic devices and the interfacial property of the $Rb_2CO_3$-doped $C_{60}$ thin film was discussed with an energy band diagram.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.504-504
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• 2011

최근 디지털 프린팅 기술의 핵심기술로 떠오르고 있는 잉크젯 프린팅 기술은 최근 기존의 문서인쇄 뿐 아니라, 직물 인쇄, 태양전지 등의 다양한 반도체 소자 제조에 널리 활용되고 있으며, 점차 그 응용 분야를 넓혀가고 있다. 특히 thermal 방식의 잉크젯 피린팅 기술은 etching, thin film process, lithography등의 반도체 공정 기술을 이용하여 제작할 수 있기 때문에, 현재 잉크젯 프린팅 기술은 대부분 thermal 방식을 체택하고 있다. 이러한 thermal 잉크젯 프린팅 방법에서는 잉크를 토출시키기 위하여, 전기적 에너지를 열에너지로 전환하는 전자저항막층이 필수적으로 필요하게 되는데, 이러한 전자저항막층은 수백도가 넘는 고온 및 잉크와 접촉으로 인한 부식 및 산화 문제가 발생할 수 있는 열악한 환경에서 사용되므로, Ta, SiN과 같은 보호층을 필수적으로 필요로 한다. 그러나 최근 잉크젯 프린터의 고해상도 고속화, 대면적 인쇄성 등과 같은 다양한 요구 증가에 따라, 잉크젯 프린터의 저전력 구동이 이슈로 떠올라 열효율에 방해가 되는 보호층을 제거할 필요성이 제기되고 있다. 지금까지는 Poly-Si, $HfB_2$, TiN, TaAl, TaN _0.8 등의 물질들이 잉크젯 프린터용 전자저항막 물질로 연구되거나 실제로 사용되어져 왔으나, 이러한 물질들을 보호층을 제거하는 경우 쉽게 산화되거나, 부식되는 문제점을 가지고 있다. 따라서, 기존 전자저항막의 기능을 만족시키면서, 산화나 부식에 대한 강한 내성을 가져 보호층을 제거하더라도 안정적으로 구동이 가능한 하이브리드 기능성(히터 + 보호층)을 가지는 잉크젯 프린터용 전자저항막 물질의 개발이 시급한 실정이다. 본 연구에서는 자기조립특성을 가져 정밀제어가 가능한 원자층증착법(Atomic Layer Deposition)을 이용하여 원자/나노 단위의 미세 구조 컨트롤을 통해 내열 내산화 내부식성 저온도저항계수를 동시에 가지는 다기능성 전자저항막을 설계 및 개발하고자 하였다. 전자저항막 개발을 위하여 우수한 내부식 내산화성을 가지고 결정립 크기에 따른 온도저항계수 조절이 가능한 platinum group metal들과 전기 저항 및 내열성 향상을 위한 물질의 복합구조막을 원자증증착법으로 증착하였다. 또한, 전자저항막 증착시 미세구조와 공정 변수가 내부식성, 내산화성, 그리고 온도저항계수에 미치는 영향을 체계적으로 연구하여, proto-type의 inkjet printhead를 구현하였다.

• Korean Journal of Materials Research
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• v.19 no.8
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• pp.437-442
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• 2009

This paper describes an improved strategy for controlling the adhesion force using both the antiadhesion and adhesion layers for a successful large-area transfer process. An MPTMS (3-mercaptopropyltrimethoxysilane) monolayer as an adhesion layer for Au/Pd thin films was deposited on Si substrates by vapor self assembly monolayer (VSAM) method. Contact angle, surface energy, film thickness, friction force, and roughness were considered for finding the optimized conditions. The sputtered Au/Pd ($\sim$17 nm) layer on the PDMS stamp without the anti-adhesion layer showed poor transfer results due to the high adhesion between sputtered Au/Pd and PDMS. In order to reduce the adhesion between Au/Pd and PDMS, an anti-adhesion monolayer was coated on the PDMS stamp using FOTS (perfluorooctyltrichlorosilane) after $O_2$ plasma treatment. The transfer process with the anti-adhesion layer gave good transfer results over a large area (20 mm $\times$ 20 mm) without pattern loss or distortion. To investigate the applied pressure effect, the PDMS stamp was sandwiched after 90$^{\circ}$ rotation on the MPTMS-coated patterned Si substrate with 1-${\mu}m$ depth. The sputtered Au/Pd was transferred onto the contact area, making square metal patterns on the top of the patterned Si structures. Applying low pressure helped to remove voids and to make conformal contact; however, high pressure yielded irregular transfer results due to PDMS stamp deformation. One of key parameters to success of this transfer process is the controllability of the adhesion force between the stamp and the target substrate. This technique offers high reliability during the transfer process, which suggests a potential building method for future functional structures.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.299-299
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• 2013

Indium Tin Oxide (ITO) has widely been used as a transparent conductive oxide (TCE) for photovoltaic devices. Lately, flexibility of ITO becomes an issue as demand of flexible device increases. Several scientists have tried to substitute ITO to different materials such as conductive polymer, graphene, CNT, and metal nanowire because of ITO brittleness. Among the substitute materials, PEDOT:PSS has mostly paid attention because PEDOT:PSS has excellent flexibility and good conductivity. The conductivity of PEDOT:PSS increases up to 1000 S/cm with additives such as DMSO, EG, sorbitol, and so on. In our research group, we introduce a conductive polymer PEDOT:PSS as a buffer layer to improve not only flexibility but also conductivity. As PEDOT:PSS layer forms beneath ITO thin film (20 nm), sheet resistance decreases from $230{\Omega}$/${\Box}$ to $85{\Omega}$/${\Box}$ and crack initiation decreases from 4.5 mm to 3.5 mm as well. We have fabricated organic photovoltaic device and power conversion efficiencies using conventional ITO electrode and ITO/PEDOT:PSS hybrid electrode. The photovoltaic property such as power conversion efficiency for ITO/PEDOT:PSS hybrid electrode is comparable to the value obtained using conventional ITO electrode on glass substrate.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.1
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• pp.44-48
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• 2013

Niobium oxide($Nb_2O_5$) films were deposited on p-type Si wafers at room temperature using in-line pulsed-DC magnetron sputtering system with various frequencies. The different duty ratios were obtained by varying the frequency of pulsed DC power from 100 to 300 kHz at the fixed reverse time of $1.5{\mu}s$. From the thickness of the sputtered $NbO_x$ films, it was possible to obtain much higher deposition rate in case of pulsed-DC sputtering than RF sputtering. However, the similar leakage currents and structural characteristics were obtained from the metal-insulator-semiconductor(MIS) structure fabricated with the $NbO_x$ films and the x-ray photoelectron spectroscopy(XPS) results in spite of the different deposition rates. From the experimental results, the $NbO_x$ films sputtered by pulsed-DC sputtering are expected to be used in the fabrication process instead of RF sputtering.