• Journal of Sensor Science and Technology
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• v.23 no.5
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• pp.337-341
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• 2014

For various additives doped-$VO_2$ critical temperature sensors using the nature of semiconductor to metal transition, the crystallinity, microstructure, and temperature vs. resistance characteristics were systematically investigated. As a starting material of $VO_2$ sensor, vanadium pentoxide ($V_2O_5$) powders were used, and CaO, SrO, $Bi_2O_3$, $TiO_2$, and PbO dopants were used, respectively. The $V_2O_5$ powders with dopants were mixed with a vehicle to form paste. This paste was silk screen-printed on $Al_2O_3$ substrates and then $V_2O_5$-based thick films were heat-treated at $500^{\circ}C$ for 2 hours in $N_2$ gas atmosphere for the reduction to $VO_2$. From X-ray diffraction analysis, $VO_2$ phases for pure $VO_2$, and CaO and SrO-doped $VO_2$ thick films were confirmed and their grain sizes were 0.57 to $0.59{\mu}m$. The on/off resistance ratio of the $VO_2$ sensor in phase transition temperature range was $5.3{\times}10^3$ and that of the 0.5 wt.% CaO-doped $VO_2$ sensor was $5.46{\times}10^3$. The presented critical temperature sensors could be commercialized for fire-protection and control systems.

• Applied Chemistry for Engineering
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• v.23 no.2
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• pp.157-163
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• 2012

Using six kinds of epoxy acrylates and a conductive carbon black, photosensitive resistor pastes were fabricated and then their developability in alkaline aqueous solution and the resistance values after thermal curing were evaluated. In order to impart the photocurability by UV exposure and the developability on alkaline solution, epoxy acrylate oligomers with carboxyl group, acrylate monomers, a photoinitiator and so forth were used. In addition, an organic peroxide was added into the paste to get a thermally curable composition. As a result, some of the pastes were not developed depending on the kinds of oligomers and, in the developed pastes, the measured resistance showed the different values depending on their compositions, even though they contain the same amount of carbon black. Finally, the optimum oligomer was selected and then, by adjusting the amount of carbon black, the kind of monomer and the curing temperature, the photosensitive resistor paste composition which showed the sheet resistance of about 0.5 $k{\Omega}/sq.$ could be obtained.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.228-229
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• 2006

본 연구에서는 PCB에 적용하기 위한 폴리머 타입 후막저항의 하나로서, 포토공정으로 저항 패턴의 형성이 가능한 페이스트를 제조하였다. 기존의 폴리머 후막저항은 스크린 인쇄를 패터닝의 주요 방법으로 하고 있어 패턴의 정밀성이 떨어지는 단점이 있었다. 이를 개선하여 고정밀 저항 패턴의 형성이 가능하도록 Photoimageable Resin을 저항 페이스트의 개발에 도입하였다. Acrylated oligomer 및 monomer, 그리고 Novolac Epoxy를 주 기지상 재료로서 사용하였으며, acrylate와 epoxy의 함량비에 따른 저항 페이스트의 현상성 및 시트저항을 평가하였다. 전도성 Filler 재료로 카본블랙을 이용하였는데, 그 물리적 특성차와 함량이 저항 페이스트의 현상성과 저항값에 미치는 영향을 평가하였다. 실험결과 Acrylate와 epoxy의 비가 2.5:1일 때 현상성이 가장 양호하였으며, 이 조성에 XC72R 카본블랙을 2g 첨가하였을 때 시트저항의 평균값은 약 $6\;k{\Omega}\{\square}$였다.

• Journal of the Microelectronics and Packaging Society
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• v.3 no.1
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• pp.41-48
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• 1996

동시 소성으로 LCR network을 구성하기 위한90$0^{\circ}C$ 소성용 Ru계 저항체를 제조하 였다. 동시 소성에 요구되는 최종온도에 이르기 위해서는 90$0^{\circ}C$에서 용융되는 유리상을 제 조하는 것이 필수적이다. 이 90$0^{\circ}C$소결용 저항 페이스트는 가장 낮은 용융온도를 갖는 PbO 의 양을 감소시키고 알루미나와 실리카의 양을 증가시켜 제조하였다. 본 연구에서는 ferrite 로 이루어진 inductor 그린쉬트 위에 ruthenate 저항체를 인쇄하여 동시소성한후 그 복합체 의 저항 특서에대하여 고찰하였다. PbO의 양이 감소될수록 복합 기판의 면적저항은 증가 되었고 inductor 기판 위에 잔류되는 저항페이스트의 양도 함께 증가하였다.

• Journal of Sensor Science and Technology
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• v.26 no.6
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• pp.438-444
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• 2017

In this paper, we focus on optimization of the in-situ phosphorous (P) doping of low-pressure chemical vapor deposited (LPCVD) poly Si resistors for obtaining near-zero temperature coefficient of resistance (TCR) at temperature range from 25 to $600^{\circ}C$. The deposited poly Si films were annealed by rapid thermal anneal (RTA) process at the temperature range from 900 to $1000^{\circ}C$ for 90s in nitrogen ambient to relieve intrinsic stress and decrease the TCR in the poly Si layer and get the Ohmic contact. After the RTA process, a roughness of the thin film was slightly changed but the grain size and crystallinity of the thin film with the increase in anneal temperature. The film annealed at $1,000^{\circ}C$ showed the behavior of Schottky contact and had dislocations in the films. Ohmic contact and TCR of $334.4{\pm}8.2$ (ppm/K) within 4 inch wafer were obtained in the measuring temperature range of 25 to $600^{\circ}C$ for the optimized 200 nm thick-poly Si film with width/length of $20{\mu}m/1,800{\mu}m$. This shows the potential of in-situ P doped LPCVD poly Si as a resistor for pressure sensor in harsh environment applications.

• Transactions on Electrical and Electronic Materials
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• v.7 no.1
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• pp.7-11
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• 2006

The changes of the electrical conductivity in chalcogenide amorphous semiconductors, $Ge_{1}Se_{1}Te_{2}$, have been studied. A phase change random access memory (PRAM) device without an access transistor is successfully fabricated with the $Ge_{1}Se_{1}Te_{2}$-phase-change resistor, which has much higher electrical resistivity than $Ge_{2}Sb_{2}Te_{5}$ and its electric resistivity can be varied by the factor of $10^5$ times, relating with the degree of crystallization. 100 nm thick $Ge_{1}Se_{1}Te_{2}$ thin film was formed by vacuum deposition at $1.5{\times}10^{-5}$ Torr. The static mode switching (DC test) is tested for the $100\;{\mu}m-sized$ $Ge_{1}Se_{1}Te_{2}$ PRAM device. In the first sweep, the amorphous $Ge_{1}Se_{1}Te_{2}$ thin film showed a high resistance state at low voltage region. However, when it reached to the threshold voltage, $V_{th}$, the electrical resistance of device was drastically reduced through the formation of an electrically conducting path. The pulsed mode switching of the $20{\mu}m-sized$ $Ge_{1}Se_{1}Te_{2}$ PRAM device showed that the reset of device was done with a 80 ns-8.6 V pulse and the set of device was done with a 200 ns-4.3 V pulse.

• Journal of electromagnetic engineering and science
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• v.8 no.3
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• pp.129-133
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• 2008

An integrated passive device(IPD) technology by semi-insulating(SI)-GaAs-based fabrication has been developed to meet the ever increasing needs of size and cost reduction in wireless applications. This technology includes reliable NiCr thin film resistor, thick plated Cu/Au metal process to reduce resistive loss, high breakdown voltage metal-insulator-metal(MIM) capacitor due to a thinner dielectric thickness, lowest parasitic effect by multi air-bridged metal layers, air-bridges for inductor underpass and capacitor pick-up, and low chip cost by only 6 process layers. This paper presents the Wilkinson power divider with excellent performance for digital cellular system(DCS). The insertion loss of this power divider is - 0.43 dB and the port isolation greater than - 22 dB over the entire band. Return loss in input and output ports are - 23.4 dB and - 25.4 dB, respectively. The Wilkinson power divider based on SI-GaAs substrates is designed within die size of $1.42\;mm^2$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.532-532
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• 2008

본 연구에서는 Embedded 기판용 폴리머 후막저항의 허용편차 개선을 위하여 새로운 후막 패터닝 기술을 도입하는 연구를 실시하였다. 기존의 Embedded 기판용 폴리머 후막저항은 스크린 인쇄에 의하여 형성됨에 따라 패턴의 정밀성이 떨어지고 기판 상 위치별 두께편차에 의하여 저항값의 허용편차(tolerance)가 ${\pm}$20~30% 정도로 큰 단점을 가지고 있다. 따라서 경화 후 laser trimming 공정을 필수적으로 동반하게 된다. 이를 개선하기 위하여 본 연구에서는 알칼리 수용액에 현상이 가능한 감광성 레진을 이용하여 폴리머 후막저항 페이스트를 제작하는 것과 함께 기판 전면에 균일한 두께로 인쇄하는 roll coating 방법을 도입하는 실험을 수행하였다. 알칼리 현상형의 감광성 레진 시스템은 노광 및 현상에 의해 정밀한 패턴을 구현할 수 있는 장점을 가지고 있으며, 본 연구에는 A사의 일액형 레진과 T사의 이액형 레진을 사용하였다. 여기에 전도성 필러로서 카본블랙을 첨가하였는데, 그 첨가량의 조절에 따른 후막저항의 시트저항값 변화와 현상 특성을 관찰하였다. 테스트 보드는 FR-4 기판 상에 전극 형상의 동박을 패터닝 후 Ni/Au 도금까지 실시하여 제작하였고, 이 테스트 보드 상에 별도로 제작된 저항 페이스트를 도포한 후 저항체 패턴이 입혀져 있는 Cr 마스크를 이용하여 노광하였다. 이후 현상 공정을 통하여 저항체를 패터닝하고, 이를 $200^{\circ}C$에서 1시간 열경화하는 것으로 후막 저항 테스트쿠폰을 제작하였다. 실험결과 roll coating에 의해 도포된 후막저항체들은 균일한 두께 범위를 나타내었고, 이에 따라 최종 경화 후 허용편차도 통상 ${\pm}$5~10% 이내로 제어될 수 있었다.