• Journal of Electrical Engineering and Technology
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• v.10 no.3
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• pp.1075-1080
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• 2015

A hybrid electric vehicle (HEV) powertrain has more than one energy source including a high-voltage electric battery. However, for a high voltage electric battery, the average current is relatively low for a given power level. Introduced to increase the voltage of a HEV battery, a compact, high-efficiency boost converter, sometimes called a step-up converter, is a dc-dc converter with an output voltage greater than its input voltage. The inductor occupies more than 30% of the total converter volume making it difficult to get high power density. The inductor should have the characteristics of good thermal stability, low weight, low losses and low EMI. In this paper, Mega Flux^® was selected as the core material among potential core candidates. Different structured inductors with Mega Flux^® were fabricated to compare the performance between the conventional air cooled and proposed potting structure. The proposed inductor has reduced the weight by 75% from 8.8kg to 2.18kg and the power density was increased from 15.6W/cc to 56.4W/cc compared with conventional inductor. To optimize the performance of proposed inductor, the potting materials with various thermal conductivities were investigated. Silicone with alumina was chosen as potting materials due to the high thermo-stable properties. The proposed inductors used potting material with thermal conductivities of 0.7W/m·K, 1.0W/m·K and 1.6W/m·K to analyze the thermal performance. Simulations of the proposed inductor were fulfilled in terms of magnetic flux saturation, leakage flux and temperature rise. The temperature rise and power efficiency were measured with the 40kW boost converter. Experimental results show that the proposed inductor reached the temperature saturation of 107℃ in 20 minutes. On the other hand, the temperature of conventional inductor rose by 138℃ without saturation. And the effect of thermal conductivity was verified as the highest thermal conductivity of potting materials leads to the lowest temperature saturations.

• Journal of Sensor Science and Technology
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• v.13 no.1
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• pp.35-40
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• 2004

A thin-film multijunction thermal converter was fabricated through the process using 6 inch silicon wafer semiconductor process and bulk micromachining. Evanohm R alloy and chromel-constantan were used as a heater and thermocouple materials, respectively. The temperature coefficient of resistance of Evanohm R heater was about 75.12 ppm/$^{\circ}C$ and the voltage sensitivity of the thermal converter indicated about 5.75 mV/mW in air. The transfer differences, measured by FRDC-DC method in the frequency range from 20 Hz to 10 kHz, showed the value under about 1.36 ppm, 0.83 ppm for the film thickness of 500, 200 nm, respectively. And in case of a 200 nm-thick thermal converter, the AC-DC transfer differences seems to be stabilized below the value of 1 ppm in the frequency range from 1 kHz to 500 kHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.697-705
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• 2014

A single chip Programmable AC to DC Power Converter, consisting of wide band gap SiC MOSFET and SiC diodes, has been proposed which converts high frequency ac voltage to a conditioned dc output voltage at user defined given power level. The converter has high conversion efficiency because of negligible reverse recovery current in SiC diode and SiC MOSFET. High frequency operation reduces the need of bigger size inductor. Lead inductors are enough to maintain current continuity. A complete electrical analysis, die area estimation and thermal analysis of the converter has been presented. It has been found that settling time and peak overshoot voltage across the device has reduced significantly when SiC devices are used with respect to Si devices. Reduction in peak overshoot also increases the converter efficiency. The total package substrate dimension of the converter circuit is only $5mm{\times}5mm$. Thermal analysis performed in the paper shows that these devices would be very useful for use as miniaturized power converters for load currents of up to 5-7 amp, keeping the package thermal conductivity limitation in mind. The converter is ideal for voltage requirements for sub-5 V level power supplies for high temperatures and space electronics systems.

• Journal of IKEEE
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• v.25 no.3
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• pp.528-533
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• 2021

This paper presents the PCB heat dissipation characteristics of high density DC-DC converter for electric vehicles. This paper also analyzes the heat dissipation structure of the high density DC-DC converter and optimizes the PCB heat dissipation design of the high density power system through thermal analysis simulation. Based on heat transfer theory, the thermal path of general electronic devices is analyzed and the thermal resistance equivalent circuit is modeled in this paper. Additionally, the thermal resistance equivalent circuit of the 500W synchronous buck converter, which is addressed in this paper, is modeled to present a structural heat dissipation path for better thermal performance. The validity of the proposed scheme is verified through the thermal analysis simulation results and experiments applying multi-surface heat dissipation structure to a 500[W](12[V], 41.67[A]) synchronous buck converter prototype with an input voltage 72[V].

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.11a
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• pp.907-908
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• 2010

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.11
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• pp.46-54
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• 1998

A planar Bi-Sb multijunction thermal converter, which is consisted of a linear or bifilar thin film NiCr-heater and a thin film Bi-Sb thermopile, has been fabricated, and its ac-dc transfer characteristics were examined in a frequency range from 10 Hz to 10 KHz. In order to increase the thermal sensitivity and to decrease the ac-dc transfer error of a thermal converter, the heater and the hot junctions of a thermopile were prepared on a Si$_3$N$_4$/SiO$_2$/Si$_3$N$_4$-diaphragm which acts as a thermal isolation layer, and the cold junctions on the Si$_3$N$_4$/SiO$_2$/Si$_3$N$_4$-thin film supported with the silicon rim which functions as a heat sink. The respective thermal sensitivities in air and in a vacuum of the converter with a built-in bifilar heater were about 14.0 ㎷/㎽ and 54.0 ㎷/㎽, and the ac-dc voltage and the current transfer difference ranges in air were about $\pm$0.60 ppm and $\pm$0.11 ppm, respectively, indicating that the ac-dc transfer accuracy of the converter are much higher than that of a commercial 3-dimensional multijunction thermal converter. However, the output thermoelectric voltage fluctuation of the converter was rather high.

• Journal of Electrical Engineering and Technology
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• v.10 no.1
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• pp.288-294
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• 2015

Recently, the module-integrated converter has shown an interest in the photovoltaic generation system. In this system, the high frequency transformer should be compact and efficient. The proposed method is based on the correlation characteristic between the copper and core loss to minimize the loss of transformer. By sizing an effective cross-sectional area and window area of core, the amount of loss is minimized. This paper presents the design and analysis of high frequency transformer by using the 3D finite element model coupled with DC-DC converter circuit for more accurate analysis by considering the nonlinear voltage and current waveforms in converter circuit. The current waveform in each winding is realized by using the ideal DC voltage source and switching component. And, the thermal analysis is performed to satisfy the electrical and thermal design criteria.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.5
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• pp.1073-1081
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• 2005

This paper describes a 3.3 V 10 bit CMOS digital-to-analog converter with a divided architecture of a 7 MSB and a 3 LSB, which uses an optimal Thermal-to-Binary Decoding method. Most of Dfh converters with hiか speed current drive are an architecture choosing current switch cell, column, row decoding method but this decoding circuit is complicated, occupies a large chip area. For these problems, this paper describes a D/A converter using an optimal Thermal-to-Binary Decoding method. The designed D/A converter with an active chip area of $0.953\;mm^2$ is fabricated by using a 0.35um process. The simulation data shows that the rise/fall time, settling time, and INL/DNL are 1.92/2.1 ns, 12.71 ns, and a less than ${\pm}2.3/{\pm}58$ LSB, respectively. The power dissipation of the D/A converter with a single power supply of 3.3 V is about 224 mW.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.187-191
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• 2007

This paper describes a 3.3V 10 bit CMOS digital-to-analog converter with a divided architecture of a 7 MSB and a 3 LSB, which uses an optimal Thermal-to-Binary Decoding method with monotonicity, glitch energy. The output stage utilizes here implements a return-to-zero circuit to obtain the dynamic performance. Most of D/A converters in decoding circuit is complicated, occupies a large chip area. For these problems, this paper describes a D/A converter using an optimal Thermal-to-Binary Decoding method. the designed D/A converter using the CMOS n-well $0.35{\mu}m$ process0. The experimental data shows that the rise/fall time, settling time, and INL/DNL are 1.90ns/2.0ns, 12.79ns, and a less than ${\pm}2.5/{\pm}0.7$ LSB, respectively. The power dissipation of the D/A converter with a single power supply of 3.3V is about 250mW.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.4
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• pp.691-698
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• 2008

This paper describes a 3.3V 10 bit CMOS digital-to-analog converter with a divided architecture of a 7 MSB and a 3 LSB, which uses an optimal Thermal-to-Binary Decoding method with monotonicity, glitch energy. The output stage utilizes here implements a return-to-zero circuit to obtain the dynamic performance. Most of D/A converters in decoding circuit is complicated, occupies a large chip area. For these problems, this paper describes a D/A converter using an optimal Thermal-to-Binary Decoding method. the designed D/A converter using the CMOS n-well $0.35{\mu}m$ process0. The experimental data shows that the rise/fall time, settling time, and INL/DNL are 1.90ns/2.0ns, 12.79ns, and a less than ${\pm}2.5/{\pm}0.7\;LSB$, respectively. The power dissipation of the D/A converter with a single power supply of 3.3V is about 250mW.