• Title/Summary/Keyword: test circuit

Search Result 1,838, Processing Time 0.06 seconds

Wire Recognition on the Chip Photo based on Histogram (칩 사진 상의 와이어 인식 방법)

  • Jhang, Kyoungson
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.53 no.5
    • /
    • pp.111-120
    • /
    • 2016
  • Wire recognition is one of the important tasks in chip reverse engineering since connectivity comes from wires. Recognized wires are used to recover logical or functional representation of the corresponding circuit. Though manual recognition provides accurate results, it becomes impossible, as the number of wires is more than hundreds of thousands. Wires on a chip usually have specific intensity or color characteristics since they are made of specific materials. This paper proposes two stage wire recognition scheme; image binarization and then the process of determining whether regions in binary image are wires or not. We employ existing techniques for two processes. Since the second process requires the characteristics of wires, the users needs to select the typical wire region in the given image. The histogram characteristic of the selected region is used in calculating histogram similarity between the typical wire region and the other regions. The first experiment is to select the most appropriate binarization scheme for the second process. The second experiment on the second process compares three proposed methods employing histogram similarity of grayscale or HSV color since there have not been proposed any wire recognition method comparable by experiment. The best method shows more than 98% of true positive rate for 25 test examples.

The Design of Multi-channel Asynchronous Communication IC Using FPGA (FPGA를 이용한 다채널 비동기 통신용 IC 설계)

  • Ock, Seung-Kyu;Yang, Oh
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.47 no.1
    • /
    • pp.28-37
    • /
    • 2010
  • In this paper, the IC (Integrated Circuit) for multi-channel asynchronous communication was designed by using FPGA and VHDL language. The existing chips for asynchronous communication that has been used commercially are composed of one to two channels. Therefore, when communication system with two channels or more is made, the cost becomes high and it becomes complicated for communication system to be realized and also has very little buffer, load that is placed into Microprocessor increases heavily in case of high speed communication or transmission of high-capacity data. The designed IC was improved the function and performance of communication system and reduced costs by designing 8 asynchronous communication channels with only one IC, and it has the size of transmitter/receiver buffer with 256 bytes respectively and consequently high speed communication became possible. To detect errors between communications, it was designed with digital filter and check-sum logic and channel MUX logic so that the malfunction can be prevented and errors can be detected more easily and input/output port regarding each communication channel can be used flexibly and consequently the reliability of system was improved. It was composed and simulated logic of VHDL described by using Cyclone II Series EP2C35F672C8 and QuartusII V8.1 of ALTERA company. In order to show the performance of designed IC, the test was conducted successfully in QuartusII simulation and experiment and the excellency was compared with TL16C550A of TI (Texas Instrument) company and ATmegal28 general-purpose micro controller of ATMEL company that are used widely as chips for asynchronous communication.

Novel Extraction Method for Unknown Chip PDN Using De-Embedding Technique (De-Embedding 기술을 이용한 IC 내부의 전원분배망 추출에 관한 연구)

  • Kim, Jongmin;Lee, In-Woo;Kim, Sungjun;Kim, So-Young;Nah, Wansoo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.24 no.6
    • /
    • pp.633-643
    • /
    • 2013
  • GDS format files, as well as layout of the chip are noticeably needed so as to analyze the PDN (Power Delivery Network) inside of IC; however, commercial IC in the market has not supported design information which is layout of IC. Within this, in terms of IC having on-chip PDN, characteristic of inside PDN of the chip is a core parameter to predict generated noise from power/ground planes. Consequently, there is a need to scrutinize extraction method for unknown PDN of the chip in this paper. To extract PDN of the chip without IC circuit information, the de-embedding test vehicle is fabricated based on IEC62014-3. Further more, the extracted inside PDN of chip from de-embedding technique adopts the Co-simulation model which composes PCB, QFN (Quad-FlatNo-leads) Package, and Chip for the PDN, applied Co-simulation model well corresponds with impedance from measured S-parameters up to 4 GHz at common measured and simulated points.

Characteristics of the Flux-lock Type Superconducting Fault Current Limiter According to the Iron Core Conditions (자속구속형 초전도 전류제한기의 철심조건에 따른 특성)

  • Nam, Gueng-Hyun;Lee, Na-Young;Choi, Hyo-Sang;Cho, Guem-Bae
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
    • /
    • v.20 no.7
    • /
    • pp.38-45
    • /
    • 2006
  • The superconducting fault current limiters(SFCLs) provide the effect such as enhancement in power system reliability due to limiting the fault current within a few miliseconds. Among various SFCLs we have developed a flux-lock type SFCL and exploited a special design to effectively reduce the fault current according to properly adjustable magnetic field after the short-circuit test. This SFCL consists of two copper coils wound in parallel on the same iron core and a component using the YBCO thin film connected in series to the secondary copper coil. Meanwhile, operating characteristics can be controlled by adjusting the inductances and the winding directions of the coils. To analyze the operational characteristics, we compared closed-loop with open-loop iron core. When the applied voltage was 200[Vrms] in the additive polarity winding, the peak values of the line current the increased up to 30.71[A] in the closed-loop and 32.01[A] in the open-loop iron core, respectively. On the other hand, in the voltages generated at current limiting elements were 220.14[V] in the closed-loop and 142.73[V] in the opal-loop iron core during first-half cycle after fault instant under the same conditions. We confirmed that the open-loop iron core had lower power burden than in the closed-loop iron core. Consequently, we found that the structure of iron core enabled the flux-lock type SFCL at power system to have the flexibility.

Development of Microwave Water Surface Current Meter for General Use to Increase Efficiency of Measurements of River Discharges (하천유량측정의 효율성 향상을 위한 범용 전자파표면유속계 개발)

  • Kim, Youngsung;Noh, Joonwoo;Choi, Kwangsoon
    • Korean Journal of Ecology and Environment
    • /
    • v.47 no.3
    • /
    • pp.225-231
    • /
    • 2014
  • Discharge measurement during flood season is very difficult. Microwave water surface current meter (MWSCM) can measures river surface velocities easily without contacting water. This study introduces its improved version, MWSCM for general use. The existing version of MWSCM is for floods so that its applicable period in a year is short. It has been improved to extend its applicability in a year. The range of measurable velocity for MWSCM for general use is extended so it can be applied during normal flows as well as high flows. MWSCM for general use can measure the velocity range of $0.03{\sim}20.0ms^{-1}$, whereas MWSCM for floods can measure the velocity range of $0.5{\sim}10.0ms^{-1}$. To make such innovation of MWSCM for general use, the applied microwave frequency of MWSCM was changed from 10 GHz to 24 GHz. Waveguide slot array antenna has been designed with the new development of the circuit of transmitting and receiving part. Improvement requests on the existing MWSCM for floods - weight lightening, measured velocity stabilization, self-test, low power consumption, and waterproof and dampproof - from the users of it have been reflected for the development of the new version of MWSCM.

Validation of a New Design of Tellurium Dioxide-Irradiated Target

  • Fllaoui, Aziz;Ghamad, Younes;Zoubir, Brahim;Ayaz, Zinel Abidine;Morabiti, Aissam El;Amayoud, Hafid;Chakir, El Mahjoub
    • Nuclear Engineering and Technology
    • /
    • v.48 no.5
    • /
    • pp.1273-1279
    • /
    • 2016
  • Production of iodine-131 by neutron activation of tellurium in tellurium dioxide ($TeO_2$) material requires a target that meets the safety requirements. In a radiopharmaceutical production unit, a new lid for a can was designed, which permits tight sealing of the target by using tungsten inert gaswelding. The leakage rate of all prepared targets was assessed using a helium mass spectrometer. The accepted leakage rate is ${\leq}10^{-4}mbr.L/s$, according to the approved safety report related to iodine-131 production in the TRIGA Mark II research reactor (TRIGA: Training, Research, Isotopes, General Atomics). To confirm the resistance of the new design to the irradiation conditions in the TRIGA Mark II research reactor's central thimble, a study of heat effect on the sealed targets for 7 hours in an oven was conducted and the leakage rates were evaluated. The results show that the tightness of the targets is ensured up to $600^{\circ}C$ with the appearance of deformations on lids beyond $450^{\circ}C$. The study of heat transfer through the target was conducted by adopting a one-dimensional approximation, under consideration of the three transfer modes-convection, conduction, and radiation. The quantities of heat generated by gamma and neutron heating were calculated by a validated computational model for the neutronic simulation of the TRIGA Mark II research reactor using the Monte Carlo N-Particle transport code. Using the heat transfer equations according to the three modes of heat transfer, the thermal study of I-131 production by irradiation of the target in the central thimble showed that the temperatures of materials do not exceed the corresponding melting points. To validate this new design, several targets have been irradiated in the central thimble according to a preplanned irradiation program, going from4 hours of irradiation at a power level of 0.5MWup to 35 hours (7 h/d for 5 days a week) at 1.5MW. The results showthat the irradiated targets are tight because no iodine-131 was released in the atmosphere of the reactor building and in the reactor cooling water of the primary circuit.

HF-Band Magnetic-Field Communication System Using Bias Switching Circuit of Class E Amplifier (E급 증폭기의 바이어스 스위칭 회로를 이용한 HF-대역 자기장 통신 시스템)

  • Son, Yong-Ho;Lee, June;Cho, Sang-Ho;Jang, Byung-Jun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.23 no.9
    • /
    • pp.1087-1093
    • /
    • 2012
  • In this paper, we implemented a HF-band magnetic-field communication system consisting of an amplitude shift keying(ASK) transmitter, a pair of loop antennas, and an ASK receiver. Especially, we suggested a new ASK transmitter architecture, where a drain bias of class E amplifier is switched alternatively between two voltage levels with respect to input data. A maximum 5 W class E amplifier was designed using a low cost IRF510 power MOSFET at the frequency of 6.78 MHz. A measured sensitivity of the designed ASK receiver is -78 dBm, which consists of a log amplifier, a filter, and a comparator. Maximum communication range of magnetic-wave communication system with loop antennas was calculated using magnetic field equations in both near-field and far-field ranges. Also, in order to verify the calculated values, an indoor propagation loss was measured using a pair of loop antennas whose dimensions are $30{\times}30cm$. Maximum operating range is estimated about 35 m in case of transmitter's output power of 1 W and receiver sensitivity of -70 dBm, respectively. Finally, the communication field test using the designed ASK transmitter and receiver was successfully done at the distance of 5 m.

Development of 1.2[kW]Class Fuel Cell Power Conversion System (1.2[kW]급 연료전지용 전력변환장치의 개발)

  • Suh, Ki-Young;Kim, Chil-Ryong;Cho, Man-Chul;Kim, Jung-Do;Yoon, Young-Byun;Kim, Hong-Sin;Park, Do-Hyung;Ha, Sung-Hyun
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
    • /
    • v.21 no.6
    • /
    • pp.117-125
    • /
    • 2007
  • Recently, a fuel cell with low voltage and high current output characteristics is remarkable for new generation system. It needs both a DC-DC step-up converter and DC-AC inverter to be used in fuel cell generation system. Therefor, this paper, consists of an isolated DC-DC converter to boost the fuel cell voltage 380[VDC] and a PWM inverter with LC filter to convent the DC voltage to single-phase 220[VAC]. Expressly, The fuel cell system which it proposes DC-DC the efficient converter used PWM the phase transient control law and it depended to portion resonance ZVS switching, loss peek voltage and electric current of realization under make schedule, switching frequency anger and the switch reduction. And mind benevolence it sprouted 2 in stop circuit and it added and a direct current voltage and the electric current where the ingredient is reduced in load side ripple stable under make whom it will be able to supply. Besides the efficiency of 92[%]is obtained over the wide output voltage regulation ranges and load variations. Also, under make over together the result leads simulation and test, the propriety confirmation.

A Study On Radiation Detection Using CMOS Image Sensor (CMOS 이미지 센서를 사용한 방사선 측정에 관한 연구)

  • Lee, Joo-Hyun;Lee, Seung-Ho
    • Journal of IKEEE
    • /
    • v.19 no.2
    • /
    • pp.193-200
    • /
    • 2015
  • In this paper, we propose the radiation measuring algorithm and the device composition using CMOS image sensor. The radiation measuring algorithm using CMOS image sensor is based on the radiation particle distinguishing algorithm projected to the CMOS image sensor and accumulated and average number of pixels of the radiation particles projected to dozens of images per second with CMOS image sensor. The radiation particle distinguishing algorithm projected to the CMOS image sensor measures the radiation particle images by dividing them into R, G and B and adjusting the threshold value that distinguishes light intensity and background from the particle of each image. The radiation measuring algorithm measures radiation with accumulated and average number of radiation particles projected to dozens of images per second with CMOS image sensor according to the preset cycle. The hardware devices to verify the suggested algorithm consists of CMOS image sensor and image signal processor part, control part, power circuit part and display part. The test result of radiation measurement using the suggested CMOS image sensor is as follows. First, using the low-cost CMOS image sensor to measure radiation particles generated similar characteristics to that from measurement with expensive GM Tube. Second, using the low-cost CMOS image sensor to measure radiation presented largely similar characteristics to the linear characteristics of expensive GM Tube.

Estimation of Road Capacity at Two-Lane Freeway Work Zones Considering the Rate of Heavy Vehicles (중차량 비에 따른 편도 2차로 고속도로 공사구간 도로 용량 추정)

  • Ko, Eunjeong;Kim, Hyungjoo;Park, Shin Hyoung;Jang, Kitae
    • The Journal of The Korea Institute of Intelligent Transport Systems
    • /
    • v.19 no.2
    • /
    • pp.48-61
    • /
    • 2020
  • The objective of this study is to estimate traffic capacity based on the heavy-vehicle ratio in a two-lane freeway work zone where one lane is blocked by construction. For this, closed circuit television (CCTV) video data of the freeway work zone was collected, and the congestion at an upstream point was observed. The traffic volume at a downstream point was analyzed after a bottleneck was created by the blockage due to the upstream congestion. A distribution model was estimated using observed-time headway, and the road capacity was analyzed using a goodness-of-fit test. Through this process, the general capacity and an equation for capacity based on the heavy-vehicle ratio passing through the work zone were presented. Capacity was estimated to be 1,181~1,422 passenger cars per hour per lane (pcphpl) at Yeongdong, and 1,475~1,589pcphpl at Jungbu Naeryuk. As the ratio of heavy vehicles increased, capacity gradually decreased. These findings can contribute to the proper capacity estimation and efficient traffic operation and management for two-lane freeway work zones that block one lane due to a work zone.