• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2005.10a
• /
• pp.794-797
• /
• 2005

The automatic load transfer switch (ALTS), a kind of electric power switch, typically automatically transfers electrical loads from a normal electrical power source to an emergency electrical power source upon reduction or loss of normal power source voltage. It can also automatically re-transfer the load to the normal power source when the normal voltage has been restored within acceptable limits. The transfer operation of ALTS is accomplished by a spring-driven linkage mechanism. In order to control or delay the transfer switching time, the ALTS studied in this paper uses the superposed leaf springs, which are subjected to impact leadings in contacting with electrical contacts. Therefore, to confirm whether the springs has enough mechanical endurance in ALTS, we build a finite element model of the superposed lear springs using LS-DYNA and perform the impact and fatigue analysis.

• Proceedings of the KIPE Conference
• /
• 2015.11a
• /
• pp.95-96
• /
• 2015

In this paper, a single-sourced PV PCS using the trinary asymmetric MLI with a single-ended pre-regulator is proposed. Trinary based asymmetric CHB inverters provide higher output levels for the same number of cells compared to other CHB inverters. However, there is an issue of regeneration with trinary asymmetric inverters and this complicates the system with requirement of bi-directional converters at the input. Modified commutation strategies have been used to remove the regeneration issue with compromise in THD. The single-ended pre-regulator provides the isolated dc-link voltage for the individual H-bridge cells with the advantage of having a single switch and magnetic component. This implementation increases the magnetic utilization of the inductor core and reduces the switching loss in the pre-regulator and also the reduced parts count contributes to the cost competiveness of the proposed PCS. The proposed PV PCS has been verified using simulation results in this paper.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.32 no.6
• /
• pp.448-453
• /
• 2019

This work reports the electrical characteristics of and temperature distribution in chalcogenide phase change memory (PCM) devices that have a self-aligned structure. GST (Ge-Sb-Te) chalcogenide alloy films were formed in a self-aligned manner by interdiffusion between sputter-deposited Ge and $Sb_2Te_3$ films during thermal annealing. A transmission electron microscopy-energy dispersive X-ray spectroscopy (TEM-EDS) analysis demonstrated that the local composition of the GST alloy differed significantly and that a $Ge_2Sb_2Te_5$ intermediate layer was formed near the $Ge/Sb_2Te_3$ interface. The programming current and threshold switching voltage of the PCM device were much smaller than those of a control device; this implies that a phase transition occurred only in the $Ge_2Sb_2Te_5$ intermediate layer and not in the entire thickness of the GST alloy. It was confirmed by computer simulation, that the localized phase transition and heat loss suppression of the GST alloy promoted a temperature rise in the PCM device.

• Journal of Power Electronics
• /
• v.19 no.2
• /
• pp.487-496
• /
• 2019

For a solid-state transformer (SST), some factors, such as signal delay, switching loss and differences in the system parameters, lead to unbalanced DC-link voltages among the cascaded H-bridges (CHB). With a control method implemented in the ${\alpha}{\beta}$ frame, the DC-link voltages are balanced, and the reactive power is equally distributed among all of the H-bridges. Based on the ${\alpha}{\beta}$ frame control, the system can achieve independent active current and reactive current control. In addition, the control method of the high-voltage stage is easy to implement without decoupling or a phase-locked loop. Furthermore, the method can eliminate additional current delays during transients and get the dynamic response rapidly without an imaginary current component. In order to carry out the controller design, the vector refactoring relations that are used to balance DC-link voltages are derived. Different strategies are discussed and simulated under the unbalanced load condition. Finally, a three-cell CHB rectifier is constructed to conduct further research, and the steady and transient experimental results verify the effectiveness and correctness of the proposed method.

• Journal of the Korean Society of Industry Convergence
• /
• v.24 no.4_1
• /
• pp.387-395
• /
• 2021

Distributed resources such as renewable energy sources and ESS are connected to the low voltage direct current(LVDC) distribution network through the power conversion system(PCS). Control power is required for the operation of the PCS. In general, controller power is supplied from AC power or DC power through switch mode power supply(SMPS). However, the conventional SMPS has a low input voltage, so development and research on high input voltage self-power suitable for LVDC is insufficient. In this paper, to develop Self-Power that can be used for LVDC, the characteristics of the conventional topology are analyzed, and a series-input single-output flyback converter using a flux-sharing transformer for high voltage is designed. The high input voltage Self-Power was designed in the DCM(discontinuous current mode) to reduce the switching loss and solve the problem of current dissipation. In addition, since it operates even at low input voltage, it can be applied to many applications as well as LVDC. The validity of the proposed high input voltage self-power is verified through experiments.

• Progress in Superconductivity and Cryogenics
• /
• v.8 no.2
• /
• pp.20-24
• /
• 2006

Recently, utility network is becoming more and more complicated and huge due to IT and OA devices. In addition to, demands of power conversion devices which have non-linear switching devices are getting more and more increased. Consequently, because of the non-linear power semiconductor devices, current harmonics are unavoidable. Sometimes those current harmonics flow back to utility network and become one of the main reasons which can make the voltage distortion. Also, it makes noise and heat loss. On the other hands, voltage sag from sudden increasing loads is also one of the terrible problems inside of utility network. In order to compensate the current harmonics and voltage sag problem, AF(active filter) systems could be a good solution method. SMES is a very good promising source due to it's high response time of charge and discharge. Therefore, the combined AF and SMES system can be a wonderful device to compensate both harmonics current and voltage sag. However, SMES needs a superconducting magnetic coil. Because of using this superconducting magnetic coil, quench problem caused by unexpected reasons have always been unavoidable. Therefore, to solve out mentioned above, this paper presents a decisive method using shunt and series active filter system combined with SMES. Especially, authors analyzed the change of original energy capacity of SMES regarding to the size of resistance caused by quench of superconducting magnetic coil.

• Journal of Advanced Engineering and Technology
• /
• v.5 no.4
• /
• pp.349-353
• /
• 2012

Recently, Mobile multimedia equipments as smart phone and tablet pc requirement is increasing and this market is also being expanded. These mobile equipments require large multi-media function, so more power consumption is required. For these reasons, the needs of power management IC as switching type dc-dc converter and linear regulator have increased. DC-DC buck converter become more important in power management IC because the operating voltage of VLSI system is very low comparing to lithium-ion battery voltage. There are many people to be concerned about digital DC-DC converter without using external passive device recently. Digital controlled DC-DC converter is essential in mobile application to various external circumstance. This paper proposes the DC-DC Buck Converter using the AVR RISC 8-bit micro-processor control. The designed converter receives the input DC 18-30 [V] and the output voltage of DC-DC Converter changes by the feedback circuit using the A/D conversion function. Duty ratio is adjusted to maintain a constant output voltage 12 [V]. Proposed converter using the micro-processor control was compared to a typical boost converter. As a result, the current loss in the proposed converter was reduced about 10.7%. Input voltage and output voltage can be displayed on the LCD display to see the status of the operation.

• The Transactions of the Korea Information Processing Society
• /
• v.3 no.4
• /
• pp.697-708
• /
• 1996

In this paper, we study reactive congestion control with priority in ATM network. The priority schemes for buffer access, partial buffer sharing have been investigated in order to improve the utilization of ATM network resources the network and to satisfy the most demanding traffic class. We consider in this paper a discrete-time queueing model for partial buffer sharing with two Markov modulated Poisson inputs. This model can be used to analyze the the effects of the partial buffer sharing priority scheme on system performance for realistic cases of bursty services. Explicit formulae are derived for the number of cells in the system and the loss probabilities for the traffic. Congestion may still occur because of unpredictable statistical fluctuation of traffic sources even when preventive control is performed in the network. In this Paper, we study reactive congestion control, in which each source changes its cell emitting rate a daptively to the traffic load at the switching node. Our intention is that,by incorporating such a congcstion control method in ATM network,more efficient congsestion control is established. We develope an analytical model,and carry out an approximateanalysis of reactive congestion con-trol with priority.Numerical results show that several orders of magnitude improvement in the loss probability can be achieved for the high priority class with little impact on the low priority class performance.And the results show that the reactive congestion control with priority are very effective in avoiding congestion and in achieving the statistical gain.

• The Journal of the Korea Contents Association
• /
• v.4 no.4
• /
• pp.189-196
• /
• 2004

Most of the recent researches for ATM switches have been based on multistage interconnection network known as regularity and self-routing property. These networks can switch packets simultaneously and in parallel. However, they are blocking networks in the sense that packet is capable of collision with each other Mainly Banyan network have been used for structure. There are several ways to reduce the blocking or to increase the throughput of banyan-type switches: increasing the internal link speeds, placing buffers in each switching node, using multiple path, distributing the load evenly in front of the banyan network and so on. Therefore, this paper proposes the use of recirculating shuffle-exchange network to reduce the blocking and to improve hardware complexity. This structures are recirculating shuffle-exchange network as simplified in hardware complexity and Rank network with tree structure which send only a packet with highest priority to the next network, and recirculate the others to the previous network. after it decides priority number on the Packets transferred to the same destination, The transferred Packets into banyan network use the function of self routing through decomposition and composition algorithm and all they arrive at final destinations. To analyze throughput, waiting time and packet loss ratio according to the size of buffer, the probabilities are modeled by a binomial distribution of packet arrival. If it is 50 percentage of load, the size of buffer is more than 15. It means the acceptable packet loss ratio. Therefore, this paper simplify the hardware complexity as use of recirculating shuffle-exchange network instead of bitonic sorter.

• Journal of IKEEE
• /
• v.25 no.2
• /
• pp.399-407
• /
• 2021

This paper proposes the DC-link voltage design method of Type 4 wind turbine that minimizes power loss and satisfies the High Voltage Ride Through(HVRT) function requirements of the transmission system operator. The Type 4 wind turbine used for large-capacity offshore wind turbine consists of the Back-to-Back converter in which the converter linked to the power grid and the inverter linked to the wind turbine share the DC-link. When the grid high voltage fault occurs in the Type 4 wind turbine, if the DC-link voltage is insufficient compared to the fault voltage level, the current controller of the grid-side converter can't operate smoothly due to over modulation. Therefore, to satisfy the HVRT function, the DC-link voltage should be designed based on the voltage level of high voltage fault. However, steady-state switching losses increase further as the DC-link voltage increases. Therefore, the considerations should be included for the loss to be increased when the DC-link voltage is designed significantly. In this paper, the design method for the DC-link voltage considered the fault voltage level and the loss is explained, and the validity of the proposed design method is verified through the HVRT function simulation based on the PSCAD model of the 2MVA Type 4 wind turbine.