• Title/Summary/Keyword: switching delay

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Transformer Leakage Inductance Calculation Used in DAB Converters Considering the Influence of SiC MOSFET Parasitic Capacitance (SiC MOSFET 기생 커패시턴스의 영향을 고려한 DAB 컨버터에 사용되는 변압기의 누설인덕턴스 계산)

  • Cheol-Woong Choi;Jae-Sub Ko;Ji-Yong So;Dae-Kyong Kim
    • Journal of the Korean Society of Industry Convergence
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    • v.27 no.4_2
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    • pp.935-942
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    • 2024
  • This study analyzes the effects of the parasitic capacitance of the SiC MOSFET used in the Dual Active Bridge ( DAB) converter and proposes a method for calculating the leakage inductance of the transformer. The DAB converter employs high-frequency switching to achieve high efficiency, high power density, and reliability. MOSFETs possess parasitic capacitance, which induces resonance with the leakage inductance of the transformer during switching operations, resulting in a voltage change delay. This paper discusses the effect of the delay of voltage changes on the DAB converter output and proposes a method to calculate the delay time. This method aims to equalize the delay time to minimize this effect and enhance the accuracy of the leakage inductance calculation of the transformer. The proposed method is validated through experiments and simulations.

Experimental Waveforms of Single-Pulse Soft-Switching PFC Converter

  • Katsunori Taniguchi;Koh, Kang-Hoon;Lee, Hyun-Woo
    • Journal of Power Electronics
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    • v.4 no.1
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    • pp.56-63
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    • 2004
  • A new driving circuit for the SPSS (Single-Pulse Soft-Switching) PFC converter is proposed. The switching device of a SPSS converter switches once in every half cycle of an AC commercial power source. Therefore, it can be solved many problems caused by the high frequency operation. The proposed SPSS converter achieves the soft-switching operation and the EMI noise can be reduced. The resonant capacitor voltage supplies to the resonant inductor even if the input AC voltage is the vicinity of zero cross voltage. Then, the power factor and input current waveform can be improved without delay time. A new driving circuit achieves the operation of SPSS converter by one switching drive circuit. The proposed converter can be satisfied the IEC standard sufficiently

Performance Evaluation of a Cell Reassembly Mechanism with Individual Buffering in an ATM Switching System

  • Park, Gwang-Man;Kang, Sung-Yeol;Han, Chi-Moon
    • ETRI Journal
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    • v.17 no.1
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    • pp.23-36
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    • 1995
  • We present a performance evaluation model of cell reassembly mechanism in an ATM switching system. An ATM switching system may be designed so that communications between processors of its control part can be performed via its switching network rather than a separate inter-processor communications network. In such a system, there should be interface to convert inter-processor communication traffic from message format to cell format and vice versa, that is, mechanisms to perform the segmentation and reassembly sublayer. In this paper, we employ a continuous-time Markov chain for the performance evaluation model of cell reassembly mechanism with individual buffering, judicially defining the states of the mechanism. Performance measures such as message loss probability and average reassembly delay are obtained in closed forms. Some numerical illustrations are given for the performance analysis and dimensioning of the cell reassembly mechanism.

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Experimental Waveforms of Single-Pulse Soft-Switching PFC Converter

  • Taniguchi, Katsunori;Koh, Kang-Hoon;Lee, Hyun-woo
    • Proceedings of the KIPE Conference
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    • 2003.07b
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    • pp.1002-1007
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    • 2003
  • A new driving circuit for the SPSS (Single-Pulse Soft-Switching) PFC converter is proposed. The switching device of a SPSS converter switches once In every half cycle of an AC commercial power source. Therefore, it can be solved many problems caused by the high frequency operation. The proposed SPSS converter achieves the soft-switching operation and the EMI noise can be reduced. The resonant capacitor voltage supplies to the resonant inductor even if the input AC voltage is the vicinity of zero cross voltage. Then, the power factor and input current waveform can be improved without delay time. A new driving circuit achieves the operation of SPSS converter by one switching drive circuit. The proposed converter can be satisfied the IEC standard sufficiently.

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Study on changes in electrical and switching characteristics of NPT-IGBT devices by fast neutron irradiation

  • Hani Baek;Byung Gun Park;Chaeho Shin;Gwang Min Sun
    • Nuclear Engineering and Technology
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    • v.55 no.9
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    • pp.3334-3341
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    • 2023
  • We studied the irradiation effects of fast neutron generated by a 30 MeV cyclotron on the electrical and switching characteristics of NPT-IGBT devices. Fast neutron fluence ranges from 2.7 × 109 to 1.82 × 1013 n/cm2. Electrical characteristics of the IGBT device such as I-V, forward voltage drop and additionally switching characteristics of turn-on and -off were measured. As the neutron fluence increased, the device's threshold voltage decreased, the forward voltage drop increased significantly, and the turn-on and turn-off time became faster. In particular, the delay time of turn-on switching was improved by about 35% to a maximum of about 39.68 ns, and that of turn-off switching was also reduced by about 40%-84.89 ns, showing a faster switching.

A Dynamic Offset and Delay Differential Assembly Method for OBS Network

  • Sui Zhicheng;Xiao Shilin;Zeng Qingji
    • Journal of Communications and Networks
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    • v.8 no.2
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    • pp.234-240
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    • 2006
  • We study the dynamic burst assembly based on traffic prediction and offset and delay differentiation in optical burst switching network. To improve existing burst assembly mechanism and build an adaptive flexible optical burst switching network, an approach called quality of service (QoS) based adaptive dynamic assembly (QADA) is proposed in this paper. QADA method takes into account current arrival traffic in prediction time adequately and performs adaptive dynamic assembly in limited burst assembly time (BAT) range. By the simulation of burst length error, the QADA method is proved better than the existing method and can achieve the small enough predictive error for real scenarios. Then the different dynamic ranges of BAT for four traffic classes are introduced to make delay differentiation. According to the limitation of BAT range, the burst assembly is classified into one-dimension limit and two-dimension limit. We draw a comparison between one-dimension and two-dimension limit with different prediction time under QoS based offset time and find that the one-dimensional approach offers better network performance, while the two-dimensional approach provides strict inter-class differentiation. Furthermore, the final simulation results in our network condition show that QADA can execute adaptive flexible burst assembly with dynamic BAT and achieve a latency reduction, delay fairness, and offset time QoS guarantee for different traffic classes.

A WLAN Pre-Authentication Scheme Based on Fast Channel Switching for 3G-WLAN Interworking (3G-WLAN Interworking 환경에서의 빠른 채널스위칭 기반의 무선랜 선인증 기법)

  • Baek, Jae-Jong;Kim, Hyo-Jin;Song, Joo-Seok
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.21 no.3
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    • pp.57-66
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    • 2011
  • The current trend of the handover authentication delay time is gradually increased according to the interworking between 3G cellular network and WLANs. Therefore, authentication mechanism minimized in delay is required to perform the seamless handover and support the inter-subnet and inter-domain handover. In this paper, we propose a novel pre-authentication scheme based on the fast channel switching which directly performs the authentication with the next access point in advance. In addition, the proposed scheme is efficient in the inter-domain handover and can be easily implemented in current WLANs since it just modifies the client side of user. To analysis and evaluate our scheme, we compare the packet loss ratio and the delay time with the two standard 802.11 authentication schemes. The analytical results show that our scheme is approximate 10 times more effective than the standard schemes in packet loss and the delay time is minimized down to 0.16 msec.

A Realization of the Synchronization Module between the Up-Link and the Down-Link for the WiBro System (WiBro 시스템에서 상향링크와 하향링크 간 시간 동기 장치 구현)

  • Park Hyong-Rock;Kim Jae-Hyung;Hong Een-Kee
    • Journal of The Institute of Information and Telecommunication Facilities Engineering
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    • v.4 no.1
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    • pp.7-13
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    • 2005
  • In this paper, we propose the time synchronization module on fiber optic repeater to use optic line delay for obtaining time synchronization between up-link and down-link, in the 2.3 GHz WiBro network using TDD/OFDM (Time Division Duplex/Orthogonal Frequency Division Multiplexing) Generally, when we use fiber optic repeater to remove the shade area, it occurs transmission delay which is caused by optic transmission between RAS (Radio Access Station) and fiber optic repeater and inner delay of fiber optic repeater. Because the WiBro system is adopting a TOO method and there exists the difference of switching time which is caused by these delay between up-link and down-link, it occurs ISI (Inter Symbol Interference), ICI (Inter Carrier Interference). These interference results in the reduction of the coverage. And the inconsistency between Up-Link and Down-Link switching time maybe gives rise to the interruption of communication. In order to prevent these cases, we propose synchronization module using analog optic line delay as the one of synchronizing up-link and down-link. And we propose the consideration factor for the designing time synchronization module and the feature of optic line of analog method. The measurement result of optic line time synchronization module of structure proposed is as follows, the delay error of $0.5{\mu}g$ and the insertion loss value below maximum 4.5dB in range of $0{\sim}40{\mu}s$. These results fully meet the specification of WiBro System.

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A New Dead-Time Compenstion Method using Time Delay Control Approach (시간지연 제어기법을 이용한 새로운 데드 타임 보상법)

  • 김현수
    • Proceedings of the KIPE Conference
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    • 2000.07a
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    • pp.425-428
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    • 2000
  • A new dead time compensation method using time delay control approach is presented. The dead time in switching pattern cause the voltage distortion and it can be considered as the disturbance voltage. In this paper the disturbance voltage is estimated using time delay control and the estimated disturbance voltage is summed with voltage command in predictive current control by a feed-forward. The proposed scheme is implemented on a PMSM and the effectiveness is verified through comparative simulation.

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Delay Fairness Using the Burst Assembly for Service Differentiation

  • Vo, Viet Minh Nhat;Le, Van Hoa;Le, Manh Thanh
    • ETRI Journal
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    • v.40 no.3
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    • pp.347-354
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    • 2018
  • Using various offset times to separate differential services is the most common form of service differentiation in optical burst switching networks. In this approach, a larger offset time is given to a higher priority burst, but it causes this burst to have a longer delay. One solution to this problem is to adjust the burst assembly time so that the buffering delay of the higher priority burst is always shorter than that of the lower priority burst. However, this adjustment causes another problem, called delay unfairness, for bursts with differential priorities that share the same path to their destination. This article proposes a new solution for delay fairness using the burst assembly.