• Journal of Institute of Control, Robotics and Systems
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• v.7 no.4
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• pp.288-294
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• 2001

In this study, a new PWM method considering the actuation delay of high speed solenoid valves is proposed to improve the response characteristics of electro hydraulic servo systems controlled by high speed solenoid valves. In addition, the decision method for the system gain, the basic period of PWM, and the sampling time is proposed, Since the conventional system controlled by high speed solenoid valves is too slow to apply this method, a high speed driving circuit(Quick-Drive) which enables rapid switching of the high speed solenoid valve at a high speed sampling mode is applied to realize this method. The experimental result shows that it is possible to achieve precision and quiet control without occurrence of limit cycle and wide range dead band.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1995.04b
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• pp.330-335
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• 1995

The actuator's response delay, disturbance and measurement noise can often cause a significant error in the target tracking of an underwater vehicle. The first purpose of this paper is error analysis about motion of an underwater vehicle when the closed loop system has actuator and disturbance and noise. The underwater vehicle is simulated for cases of various disturbances. The second purpose is robust controller design for the underwater vehicle with parameter uncertainty. So, two robust control methods are applied for the underwater vehicle. One is standard $H_{\infty}$ control, and the other is time-varying sliding mode control with modified saturation function. Suboptimal design parameters for $H_{\infty}$ control, and design parameters for time-varying switching surfaces are provided Simulations for the two controllers are carried out and their performances are analyzed.lyzed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.8
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• pp.2033-2042
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• 1996

In this papre, we describe a recently implemented echo canceller for digital cellular communication of Code Division Multiple Access(CDMA) that features time sharing of digital signal processor(DSP) over four channels in one DSP to reduce per channel costs. In the Public Land Mobile Network(PLMN), it is important to cancel the echo reflected from the Public Switched Telephone Network(PSTN) side. In case of digital mobile system, the round-trip delay of the echo is in excess of about 180 milliseconds due to frame-by-frame voice coding. It is necessary to cancel the echo in PLMN. We have developed a multi-channel echo canceller tht operates with Time Switch Module in a Mobile Switching Center(MSC). The general echo canceller needs PCM trunk interface circuits and the tone detection and disabling circuits, but the multi-channel echo canceller linked with Time Switch Module does not need them. Therefore we could develop the effective and economical echo canceller.

• Journal of Sensor Science and Technology
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• v.26 no.4
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• pp.292-296
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• 2017

It has become ever harder to design reliable circuits with each nanometer technology node under normal operation conditions, a transistor device can be affected by various aging effects resulting in performance degradation and eventually design failure. The reliability (aging) effect has traditionally been the area of process engineers. However, in the future, even the smallest of variations can slow down a transistor's switching speed, and an aging device may not perform adequately at a very low voltage. Because of such dilemmas, the transistor aging is emerging as a circuit designer's problem. Therefore, in this paper, the impact of aging effects on the delay and power dissipation of digital circuits by using nanomneter MOSFET power gating structure has been analyzed.. Based on this analyzed aging models, a reliable digital circuits can be designed.

• Journal of Electrical Engineering and information Science
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• v.2 no.4
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• pp.8-13
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• 1997

This paper describes a scalable systolic synchronous memory for digital signal processing and packet switching. The systolic synchronous memory consists of the 2-D array of small memory blocks which are fully pipelined and communicated in three directions with adjacent blocks. The maximum delay of a small memory block becomes the operation speed of the chip. The array configuration is scalable for the entire memory size requested by an application. it has the initial latency of N+3 cycles with NxN array configuration. We designed an experimental 200 MHz 4Kb static RAM chip with the 4x4 array configuration of 256 SRAM blocks. It was fabricated is 0.8$\mu\textrm{m}$ twin-well single-poly double-metal CMOS technology.

• ETRI Journal
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• v.29 no.1
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• pp.79-88
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• 2007

This paper proposes a novel concept of adjusting the hardware size in a multi-carrier code division multiple access (MC-CDMA) receiver in real time as per the channel parameters such as delay spread, signal-to-noise ratio, transmission rate, and Doppler frequency. The fast Fourier transform (FFT) or inverse FFT (IFFT) size in orthogonal frequency division multiplexing (OFDM)/MC-CDMA transceivers varies from 1024 points to 16 points. Two low-power reconfigurable radix-4 256-point FFT processor architectures are proposed that can also be dynamically configured as 64-point and 16-point as per the channel parameters to prove the concept. By tailoring the clock of the higher FFT stages for longer FFTs and switching to shorter FFTs from longer FFTs, significant power saving is achieved. In addition, two 256 sub-carrier MC-CDMA receiver architectures are proposed which can also be configured for 64 sub-carriers in real time to prove the feasibility of the concept over the whole receiver.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.529-532
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• 2000

This paper addresses how to be connected with end-to-end shortcut using ATM Switched Virtual Connection (SVC) in ATM-based Multi-Protocol Label Switching (MPLS) Networks. Without additionally existing ATM Ships-in-the-Night (SIN) mode, when the stream is continuously transmitted at the same destination with the lapse of determined aging time, the connection is changed with end-to-end shortcut connection using ATM signaling. An ATM direct short circuit is performed an IP and ATM effective integration. An ATM shortcut has a number of advantages, like higher throughput, shorter end-to-end delay, reduced router load, better utilization of L2 Quality of Service (QoS) capabilities, and route optimization. In particular between other MPLS domains, this can be efficiently improved the performance of networks.

• Journal of The Korean Astronomical Society
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• v.4 no.1
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• pp.9-16
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• 1971

The asymmetry of received intensity pattern within the bandwidth is derived from the analogy of the intensity distribution of two-slit interference. This suggests that the length of $\frac{1}{2}{\lambda}$ delay line should be adjusted to the slightly upper frequency than the central frequency of the radio telescope with a wide bandwith. Some strange communication signals and man-made noises prevented us from obtaining the discernible information from the observed data for the sun. To overcome this difficulties, it is necessary to alter the operating frequency and site. It will be fo1lowed to measure the angular dimensions of the superposed radio sources by changing the distance between two antennas.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.1B
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• pp.64-70
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• 2003

In order to provide seamless wireless Internet service, the basic mobile IP protocol should be enhanced to solve packet loss problem from large registration latency because frequent handoffs occur in cellular networks. In this paper, we suggest a new micro-mobility management protocol based on MPLS while supporting Qos, and evaluate its performance using simulation. We use MPLS label switching techniuqe in cellular access networks to simplify location management and speed up packet transmission. We adopt context transfer procedure to minimize the delay needed to attain prior level of service after handoff Packet loss can be minimized during handoff by transmitting received packets from old BSLER to new BSLER using a spliced LSP between them. Simulation results show that the proposed MPLS-based micro-mobility management protocol provides a seamless handoff and supports QoS of user traffic.

• ETRI Journal
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• v.27 no.4
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• pp.469-472
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• 2005

To enhance the scalability of high performance packet switches, a two-stage load-balanced switch has recently been introduced, in which each stage uses a deterministic sequence of configurations. The switch is simple to make scalable and has been proven to provide 100% throughput. However, the load-balanced switch may mis-sequence the packets. In this paper, we propose an algorithm called full frame stuff (FFS), which maintains packet order in the two-stage load-balanced switch and has excellent switching performance. This algorithm is distributed and each port can operate independently.