• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.90-92
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• 2002

This paper presents an improved C-Dump converter system for switched reluctance motors(SRM). The proposed C-Dump converter derived from the conventional converter for SRM. The proposed converter could overcome the limitation of the conventional C-Dump converter, and could reduce the whole cost of the SRM system since the voltage stress of the dump switch $T_d$ is reduced to $V_{dc}$ when compared with $2V_{dc}$ for the conventional C-Dump converter. The attractive features of the proposed converters are; high-efficient and low-cost, elimination of dump inductor, simple control strategy, smaller size arid light weight. The proposed converter is able to be fast magnetization by $2V_{dc}$, which is sum of the input voltage and charging voltage of the dump capacitor. Also, this topology has many advantages such as freewheeling of phase winding without complex control, reduction of current ripple, reduction of torque ripple, and reduction of switching frequency. Simulation demonstrates the good performance of the converter.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1990년도 하계학술대회 논문집
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• pp.409-412
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• 1990

Series connection of power switching semiconductor elements is unavoidable when a high voltage convertor is aimed. However, it is important to equalize distribution of turn-off voltage because the switching elements have different characteristics. In this paper optimal switching control algorithm is proposed so that series connected poker switching semiconductor elements can be always switched simultaneous turn-on and turn-off.

• JSTS:Journal of Semiconductor Technology and Science
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• 제10권3호
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• pp.165-175
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• 2010

This paper presents a fine-grain supply-voltage-control scheme for low-power FPGAs. The proposed supply-voltage-control scheme detects the critical path in real time with small overheads by exploiting features of asynchronous architectures. In an FPGA based on the proposed supply-voltage-control scheme, logic blocks on the sub-critical path are autonomously switched to a lower supply voltage to reduce the power consumption without system performance degradation. Moreover, in order to reduce the overheads of level shifters used at the power domain interface, a look-up-table without level shifters is employed. Because of the small overheads of the proposed supply-voltage-control scheme and the power domain interface, the granularity size of the power domain in the proposed FPGA is as fine as a single four-input logic block. The proposed FPGA is fabricated using the e-Shuttle 65 nm CMOS process. Correct operation of the proposed FPGA on the test chip is confirmed.

• Journal of Electrical Engineering and Technology
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• 제13권2호
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• pp.800-811
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• 2018

This paper presents a regenerative braking control scheme for Switched Reluctance Machine (SRM) drive in Electric Vehicles (EVs). The main purpose is to maximize the recovered energy during battery charging by taking into account the nonlinear physical characteristics of the Switched Reluctance Machine. The proposed regenerative braking method employs the back-EMF in the generation process as a complicated position-dependent voltage source. The proposed maximum power recovery (MPR) operation of the regenerative braking is first based on the maximization of the extracted power from the machine and then the maximization of the power transferred to the battery. The maximum power extraction (MPE) from SRM is based on maximizing the energy conversion ratio by the calculation of the optimum PWM switching duty cycle, turn-on, and turn-off angles. By using the impedance matching theorem that allows the maximum power transfer (MPT) of the MPE, the proposed MPR is achieved. The parametric averaged value modeling of the machine phase currents in the chopping control mode is used for MPR realization. By following this model, a nonlinear equivalent input resistance is derived for the battery internal resistance matching. The effectiveness of the proposed regenerative braking method is demonstrated through simulation results and experimental implementation.

• Journal of Power Electronics
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• 제11권4호
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• pp.520-526
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• 2011

This paper presents a balanced soft-chopping circuit and a modified PI controller for a high speed 4/2 Switched Reluctance Motor (SRM) with a 16 pulse per revolution encoder. The proposed balanced soft-chopping circuit can supply double the switching frequency in the fixed switching frequency of power devices to reduce current ripple. The modified PI controller uses maximum voltage, back-emf voltage and PI control modes to overcome the over-shoot current due to the time delay effect of current sensing. The maximum voltage mode can supply a fast excitation current with consideration of the hardware time delay. Then the back-emf voltage mode can suppress the current over-shoot with consideration of the feedback signal delay. Finally, the PI control mode can adjust the phase current to a desired value with a fast switching frequency due to the proposed balanced soft-chopping technology.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 B
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• pp.651-653
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• 2002

This paper suggests the current control method that is possible to control Switched Reluctance Motor(SRM) with high performance current controller. The proposed control method is the way that uses the powerful current cintroller developed the speed emf with a proper voltage in an each inductance region instead of the existed PI controller. The suggested current control strategies are verified by simulations and experiments in this paper.

• 전기학회논문지
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• 제66권2호
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• pp.328-338
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• 2017

In this paper, a zero torque control scheme adopting current sharing function (CSF) used in integrated Switched Reluctance Motor (SRM) drive with DC battery charger is proposed. The proposed control scheme is able to achieve the keeping position (KP), zero torque (ZT) and power factor correction (PFC) at the same time with a simple novel current sharing function algorithm. The proposed CSF makes the proper reference for each phase windings of SRM to satisfy the total charging current of the battery with zero torque output to hold still position with power factor correction, and the copper loss minimization during of battery charging is also achieved during this process. Based on these, CSFs can be used without any recalculation of the optimal current at every sampling time. In this proposed integrated battery charger system, the cost effective, volume and weight reduction and power enlargement is realized by function multiplexing of the motor winding and asymmetric SR converter. By using the phase winding as large inductors for charging process, and taking the asymmetric SR converter as an interleaved converter with boost mode operation, the EV can be charged effectively and successfully with minimum integral system. In this integral system, there is a position sliding mode controller used to overcome any uncertainty such as mutual inductance or DC offset current sensor. Power factor correction and voltage adaption are obtained with three-phase buck type converter (or current source rectifier) that is cascaded with conventional SRM, one for wide input and output voltage range. The practicability is validated by the simulation and experimental results by using a laboratory 3-hp SRM setup based on TI TMS320F28335 platform.

• Journal of Magnetics
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• 제19권1호
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• pp.90-100
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• 2014

Position estimation that uses only active phase voltage and current is presented, to perform high accuracy position sensorless control of a SRM drive. By extracting the amplitude of the first switching harmonic terms of phase voltage and current for a PWM period through Fast Fourier Transform (FFT), the flux-linkage and position are estimated without external hardware circuitry, such as a modulator and demodulator, which result in increased cost, as well as large position estimation error, produced when the motional back EMF is ignored near zero speed. A two-phase SRM drive system, consisting of an asymmetrical converter and a conventional closed-loop PI current controller, is utilized to validate the performance of the proposed position estimation scheme in comprehensive operating conditions. It is shown that the estimated values very closely track the actual values, in dynamic simulations and experiments.

• Journal of Power Electronics
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• 제10권5호
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• pp.461-467
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• 2010

This paper proposes a new soft-switched Sepic converter. It has low switching losses and low conduction losses due to its auxiliary communicated circuit and synchronous rectifier operation, respectively. Because of its positive and buck/boost-like DC voltage transfer function (M=D/(1-D)), the proposed converter is desirable for use in distributed power systems. The proposed converter has versions both with and without a transformer. The paper also suggests some design guidelines in terms of the power circuit and the control loop for the proposed converter.

• Journal of international Conference on Electrical Machines and Systems
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• 제1권1호
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• pp.67-76
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• 2012

Due to the increasing amount of applications of power electronic ac-dc converters, it is necessary to design a single-stage converter that can reliably perform both buck and boost operations. Traditionally, this can be achieved by double-stage conversion (ac/dc-dc/dc) which ultimately leads to less efficiency and a more complex control system. This paper discusses two types of modern ac-dc converters. First, the novel impedance-source ac-dc converter, abbreviated as custom Z-source rectifier, is analyzed; and then, switched inductor (SL) Z-source ac-dc converter is proposed. This paper describes the Z-source rectifiers' operating principles, the concepts behind them, and their superiorities. Analysis and simulation results show that the proposed custom Z-source rectifier can step up and step down voltage; and the main advantage of the SL Z-source ac-dc converter is its high step-up capability. Low ripple of the output dc voltage is the other advantage of the proposed converters. Finally, the SL Z-source ac-dc converter is compared with the custom Z-source ac-dc converter.