• Electronics and Telecommunications Trends
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• v.14 no.2 s.56
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• pp.53-57
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• 1999

Speedup is often used to show scalability, but its classical definition fails to explain some real measurements such as superlinear speedup. This leads to scaled speedup which scales other system parameters as number of rocessors changes. In this paper, scaled speedup and architectural speedup are introduced and superlinear speedup is explained with its cause.

• Proceedings of the Korea Inteligent Information System Society Conference
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• 2006.06a
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• pp.303-310
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• 2006

The sorting algorithms have been developed to take advantage of distributed computers. But the speedup of parallel sorting algorithms decrease rapidly with increased number of processors due to parallel processing overhead such as context switching time and inter-processor communication cost. In this paper, we propose a parallel sorting method which provides linear speedup of an optimal serial algorithm for a system with a large number of processors. This algorithm may even provide superlinear speedup for a practical system. The algorithm takes advantage of an interconnection network properties and its protocol.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.3
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• pp.136-144
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• 2015

The EEG system can be classified as a wired or wireless device. Each device used for the medical or entertainment purposes. The collected EEG signals from sensor are analyzed using feature extractions. A wireless EEG system provides good portability and convenience, however, it requires a mobile system that has heavy computing power. In this paper a single board system is proposed to handle EEG signal processing for BCI applications. Unfortunately, the computing power of a single board system is limited unlike general desktop systems. Thus, parallel approach using multiple single board systems is investigated. The parallel EEG signal processing system that we built demonstrates superlinear speedup for an EEG signal processing algorithm.