• Research in Mathematical Education
• /
• v.24 no.1
• /
• pp.1-27
• /
• 2021

For elementary school children, learning the standard multiplication algorithm with accuracy, clarity, consistency, and efficiency is a daunting task. Nonetheless, what should be our expectation in procedural fluency, for example, in finding the product of 25 and 37 among fifth grade students? Collectively, has the mathematics education community emphasized the value of conceptual understanding to the detriment of procedural fluency? In addition to examining these questions, we survey multiplication algorithms throughout history and in textbooks and reconceptualize the standard multiplication algorithm by using a new tool called the Multiplication Aid Template.

• Journal of Elementary Mathematics Education in Korea
• /
• v.14 no.2
• /
• pp.287-314
• /
• 2010

The algorithm is a chain of mechanical procedures, capable of solving a problem. In modern mathematics educations, the teaching algorithm is performing an important role, even though contracted than in the past. The conspicuous characteristic of current elementary mathematics textbook's manner of manipulating multiplication algorithm is exceeding converge to 'standard algorithm.' But there are many algorithm other than standard algorithm in calculating multiplication, and this diversity is important with respect to didactical dimension. In this thesis, we have reconstructed the experimental learning and teaching plan of multiplication algorithm unit by making the best use of diversity of multiplication algorithm. It's core contents are as follows. Firstly, It handled various modified algorithms in addition to standard algorithm. Secondly, It did not order children to use standard algorithm exclusively, but encouraged children to select algorithm according to his interest. As stated above, we have performed teaching experiment which is ruled by new lesson design and analysed the effects of teaching experiment. Through this study, we obtained the following results and suggestions. Firstly, the experimental learning and teaching plan was effective on understanding of the place-value principle and the distributive law. The experimental group which was learned through various modified algorithm in addition to standard algorithm displayed higher degree of understanding than the control group. Secondly, as for computational ability, the experimental group did not show better achievement than the control group. It's cause is, in my guess, that we taught the children the various modified algorithm and allowed the children to select a algorithm by preference. The experimental group was more interested in diversity of algorithm and it's application itself than correct computation. Thirdly, the lattice method was not adopted in the majority of present mathematics school textbooks, but ranked high in the children's preference. I suggest that the mathematics school textbooks which will be developed henceforth should accept the lattice method.

• Communications of Mathematical Education
• /
• v.35 no.4
• /
• pp.505-525
• /
• 2021

In this study, we investigated how multiplication by 2-digit numbers had been taught in elementary mathematics textbooks of Korea, Japan, Singapore, and USA. As a result of analysis, we found as follows. Korean textbooks do not teach the multiplication by 10 and the multiplication by power of 10, but Japanese, Singapore, and US textbooks explicitly teach related content. In the '×tens' teaching, Japanese and American textbooks teach formally the law of association of multiplication applied in the process of calculating the partial product of multiplication. The standard multiplication algorithm generally followed a standard method of recording partial product result according to the law of distribution, but the differences were confirmed in the multiplication model, the teaching method of the law of distribution, and the notation of the last digit '0'. Based upon these results, we suggested some proposals for improving the multiplication teaching.

• Proceedings of the IEEK Conference
• /
• 1998.10a
• /
• pp.1025-1028
• /
• 1998

Hardware to implement the parallelized Floating-point rounding algorithm is described. For parallelized additions, we propose an addition module which has carry selection logic to generate two results accoring to the input valuse. A multiplication module for parallelized multiplications is also proposed to generate Sum and Carry bits as intermediate results. Since these modules process data in IEEE standard Floatingpoint double precision format, they are designed for 53-bit significands including hidden bits. Multiplication module is designed with a Booth multiplier and an array multiplier.

• School Mathematics
• /
• v.14 no.1
• /
• pp.135-150
• /
• 2012

This paper analyzes the activities for (fraction) ${\times}$(fraction) in Korean elementary textbooks focusing on the connection between visual models and the algorithm. New Korean textbook attempts a new approach to use length model (as well as rectangular area model) for developing the standard algorithm for the multiplication of fractions, $\frac{a}{b}{\times}\frac{d}{c}=\frac{a{\times}d}{b{\times}c}$. However, activities with visual models in the textbook are not well connected to the algorithm. To bridge the gap between activities with models and the algorithm, distributive strategy should be emphasized. A wealth of experience of solving problems of fraction multiplication using the distributive strategy with visual models can serve as a strong basis for developing the algorithm for the multiplication of fractions.

• The Transactions of the Korean Institute of Electrical Engineers D
• /
• v.54 no.12
• /
• pp.723-731
• /
• 2005

The $4{\times}4$ homogeneous transformation matrix is a compact representation of orientation and position of an object in robotics and computer graphics. A coordinate transformation is accomplished through the successive multiplications of homogeneous matrices, each of which represents the orientation and position of each corresponding link. Thus, for real time control applications in robotics or animation in computer graphics, the fast multiplication of homogeneous matrices is quite demanding. In this paper, a parallel-architecture vector processor is designed for this purpose. The processor has several key features. For the accuracy of computation for real application, the operands of the processors are floating point numbers based on the IEEE Standard 754. For the parallelism and reduction of hardware redundancy, the processor takes column vectors of homogeneous matrices as multiplication unit. To further improve the throughput, the processor structure and its control is based on a pipe-lined structure. Since the designed processor can be used as a special purpose coprocessor in robotics and computer graphics, additionally to special matrix/matrix or matrix/vector multiplication, several other useful instructions for various transformation algorithms are included for wide application of the new design. The suggested instruction set will serve as standard in future processor design for Robotics and Computer Graphics. The design is verified using FPGA implementation. Also a comparative performance improvement of the proposed design is studied compared to a uni-processor approach for possibilities of its real time application.

• Proceedings of the IEEK Conference
• /
• 2005.11a
• /
• pp.695-698
• /
• 2005

The finite-field multiplication can be applied to the wide range of applications, such as signal processing on communication, cryptography, etc. However, an efficient algorithm and the hardware design are required since the finite-field multiplication takes much time to compute. In this paper, we propose a radix-4 systolic multiplier on $GF(2^m)$ with comparative area and performance. The algorithm of the proposed standard-basis multiplier is mathematically developed to map on low-cost systolic cell, so that the proposed systolic architecture is suitable for VLSI design. Compared to the bit-serial and digit-serial multipliers, the proposed multiplier shows relatively better performance with low cost. We design and synthesis $GF(2^{193})$ finite-field multiplier using Hynix $0.35{\mu}m$ standard cell library and the maximum clock frequency is 400MHz.

• Proceedings of the IEEK Conference
• /
• 1999.06a
• /
• pp.333-336
• /
• 1999

In this paper, a new high speed parallel input and parallel output GF(2$^{m}$ ) multiplier based on standard basis is proposed. The concept of the multiplication in standard basis coordinates gives an easier VLSI implementation than that of the dual basis. This proposed algorithm and method of implementation of the GF(2$^{m}$ ) multiplication are represented by two kinds of basic cells (which are the generalized and fixed basic cell), and the minimum critical path with pipelined operation. In the case of the generalized basic cell, the proposed multiplier is composed of $m^2$ basic cells where each cell has 2 two input AND gates, 2 two input XOR gates, and 2 one bit latches Specifically, we show that the proposed multiplier has smaller complexity than those proposed in 〔5〕.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.29 no.3
• /
• pp.515-518
• /
• 2019

The performance of Elliptic Curves Cryptosystem(ECC) is dominated by the modular multiplication since the elliptic curve scalar multiplication consists of the modular multiplication in projective coordinates. In this paper, we propose a new method that combines the Karatsuba-Ofman multiplication method and a new modular reduction algorithm in order to improve the performance of the modular multiplication for NIST p224 in the FIPS 186-4 standard. The proposed method leads to a running time improvement for computing the modular multiplication about 25% faster than the previous methods. The results also show that the method can reduce the arithmetic complexity by half when compared with traditional implementations on the standpoint of the modular reduction.

• Journal of KIISE:Computer Systems and Theory
• /
• v.36 no.6
• /
• pp.502-510
• /
• 2009

Multiprecision squaring is one of the most significant algorithms in the core public key cryptography operation. The aim of this work is to present a new improved squaring algorithm compared with the MIRACL's multi precision squaring algorithm in which the previous work [1] on multiprecision multiplication is implemented. First, previous works on multiprecision multiplication and standard squaring are analyzed. Then, our new Lazy Doubling squaring algorithm is introduced. In MIRACLE library [3], Scott's Carry-Catcher Hybrid multiplication technique [1] is applied to implementation of multiprecision multiplication and squaring. Experimental results of the Carry-Catcher hybrid squaring algorithm and the proposed Lazy Doubling squaring algorithm both of which are tested on Atmega128 CPU show that proposed idea has achieved significant performance improvements. The proposed Lazy Doubling Squaring algorithm reduces addition instructions by the fact $a_0\;{\ast}\;2\;+\;a_1\;{\ast}\;2\;+\;...\;+\;a_{n-1}\;{\ast}\;2\;+\;a_n\;{\ast}\;2\;=\;(a_0\;+\;a_1\;+\;...\;+\;a_{n-1}\;+\;a_n)\;{\ast}\;2$ while the standard squaring algorithm reduces multiplication instructions by the fact $S_{ij}\;=\;x_i\;{\ast}\;x_j\;=\;S_{ij}$. Experimental results show that the proposed squaring method is 25% faster than that in MIRACL.