• Electronics and Telecommunications Trends
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• v.35 no.3
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• pp.76-84
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• 2020

Neuromorphic hardware refers to brain-inspired computers or components that model an artificial neural network comprising densely connected parallel neurons and synapses. The major element in the widespread deployment of neural networks in embedded devices are efficient architecture for neuromorphic hardware with regard to performance, power consumption, and chip area. Spiking neural networks (SiNNs) are brain-inspired in which the communication among neurons is modeled in the form of spikes. Owing to brainlike operating modes, SNNs can be power efficient. However, issues still exist with research and actual application of SNNs. In this issue, we focus on the technology development cases and market trends of two typical tracks, which are listed above, from the point of view of artificial intelligence neuromorphic circuits and subsequently describe their future development prospects.

• Smart Media Journal
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• v.11 no.2
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• pp.77-83
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• 2022

The neuromorphic architecture uses a spiking neural network (SNN) model to derive more accurate results as more spike values are accumulated through inference experiments. When the inference result converges to a specific value, even if the inference experiment is further performed, the change in the result is smaller and power consumption may increase. In particular, in an AI-based IoT environment, power consumption can be a big problem. Therefore, in this paper, we propose a technique to reduce the power consumption of AI-based IoT by reducing the inference time by adjusting the inference image exposure time in the neuromorphic architecture environment. The proposed technique calculates the next inferred image exposure time by reflecting the change in inference accuracy. In addition, the rate of reflection of the change in inference accuracy can be adjusted with a coefficient value, and an optimal coefficient value is found through a comparison experiment of various coefficient values. In the proposed technique, the inference image exposure time corresponding to the target accuracy is greater than that of the linear technique, but the overall power consumption is less than that of the linear technique. As a result of measuring and evaluating the performance of the proposed method, it is confirmed that the inference experiment applying the proposed method can reduce the final exposure time by about 90% compared to the inference experiment applying the linear method.

• Electronics and Telecommunications Trends
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• v.36 no.3
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• pp.106-118
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• 2021

The field of brain science (or neuroscience in a broader sense) has inspired researchers in artificial intelligence (AI) for a long time. The outcomes of neuroscience such as Hebb's rule had profound effects on the early AI models, and the models have developed to become the current state-of-the-art artificial neural networks. However, the recent progress in AI led by deep learning architectures is mainly due to elaborate mathematical methods and the rapid growth of computing power rather than neuroscientific inspiration. Meanwhile, major limitations such as opacity, lack of common sense, narrowness, and brittleness have not been thoroughly resolved. To address those problems, many AI researchers turn their attention to neuroscience to get insights and inspirations again. Biologically plausible neural networks, spiking neural networks, and connectome-based networks exemplify such neuroscience-inspired approaches. In addition, the more recent field of brain network analysis is unveiling complex brain mechanisms by handling the brain as dynamic graph models. We argue that the progress toward the human-level AI, which is the goal of AI, can be accelerated by leveraging the novel findings of the human brain network.

• Journal of Sensor Science and Technology
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• v.29 no.1
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• pp.68-73
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• 2020

This paper proposes an asynchronous circuit design methodology using a new Single Gate Sleep Convention Logic (SG-SCL) with advantages such as low area overhead, low power consumption compared with the conventional null convention logic (NCL) methodologies. The delay-insensitive NCL asynchronous circuits consist of dual-rail structures using {DATA0, DATA1, NULL} encoding which carry a significant area overhead by comparison with single-rail structures. The area overhead can lead to high power consumption. In this paper, the proposed single gate SCL deploys a power gating structure for a new {DATA, SLEEP} encoding to achieve low area overhead and low power consumption maintaining high performance during DATA cycle. In this paper, the proposed methodology has been evaluated by a liquid state machine (LSM) for pattern and digit recognition using FPGA and a 0.18 ㎛ CMOS technology with a supply voltage of 1.8 V. the LSM is a neural network (NN) algorithm similar to a spiking neural network (SNN). The experimental results show that the proposed SG-SCL LSM reduced power consumption by 10% compared to the conventional LSM.

• The Journal of the Acoustical Society of Korea
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• v.39 no.4
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• pp.286-291
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• 2020

In this paper, we propose a system that recommends music through tempo-oriented music classification and sensor-based human activity recognition. The proposed method indexes music files using tempo-oriented music classification and recommends suitable music according to the recognized user's activity. For accurate music classification, a dynamic classification based on a modulation spectrum and a sequence classification based on a Mel-spectrogram are used in combination. In addition, simple accelerometer and gyroscope sensor data of the smartphone are applied to deep spiking neural networks to improve activity recognition performance. Finally, music recommendation is performed through a mapping table considering the relationship between the recognized activity and the indexed music file. The experimental results show that the proposed system is suitable for use in any practical mobile device with a music player.

• The Journal of Korea Robotics Society
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• v.1 no.2
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• pp.163-171
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• 2006

This paper introduces the research progress on the artificial brain in the Telerobotics and Control Laboratory at KAIST. This series of studies is based on the assumption that it will be possible to develop an artificial intelligence by copying the mechanisms of the animal brain. Two important brain mechanisms are considered: spike-timing dependent plasticity and dopaminergic plasticity. Each mechanism is implemented in two coding paradigms: spike-codes and rate-codes. Spike-timing dependent plasticity is essential for self-organization in the brain. Dopamine neurons deliver reward signals and modify the synaptic efficacies in order to maximize the predicted reward. This paper addresses how artificial intelligence can emerge by the synergy between self-organization and reinforcement learning. For implementation issues, the rate codes of the brain mechanisms are developed to calculate the neuron dynamics efficiently.

• Journal of Software Assessment and Valuation
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• v.17 no.2
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• pp.47-57
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• 2021

Neuromorphic technology is proposed to complement the shortcomings of existing artificial intelligence technology by mimicking the human brain structure and computational process with hardware. NA-IDE has also been proposed for developing neuromorphic hardware-based IoT applications. To implement an SNN model in NA-IDE, commonly used input data must be transformed for use in the SNN model. In this paper, we implemented a neural coding method encoder component that converts image data into a spike train signal and uses it as an SNN input. The decoder component is implemented to convert the output back to image data when the SNN model generates a spike train signal. If the decoder component uses the same parameters as the encoding process, it can generate static data similar to the original data. It can be used in fields such as image-to-image and speech-to-speech to transform and regenerate input data using the proposed encoder and decoder.