• Title/Summary/Keyword: source/drain

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Transparent and Flexible All-Organic Multi-Functional Sensing Devices Based on Field-effect Transistor Structure

  • Trung, Tran Quang;Tien, Nguyen Thanh;Seol, Young-Gug;Lee, Nae-Eung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.491-491
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    • 2011
  • Transparent and flexible electronic devices that are light-weight, unbreakable, low power consumption, optically transparent, and mechanical flexible possibly have great potential in new applications of digital gadgets. Potential applications include transparent displays, heads-up display, sensor, and artificial skin. Recent reports on transparent and flexible field-effect transistors (tf-FETs) have focused on improving mechanical properties, optical transmittance, and performances. Most of tf-FET devices were fabricated with transparent oxide semiconductors which mechanical flexibility is limited. And, there have been no reports of transparent and flexible all-organic tf-FETs fabricated with organic semiconductor channel, gate dielectric, gate electrode, source/drain electrode, and encapsulation for sensor applications. We present the first demonstration of transparent, flexible all-organic sensor based on multifunctional organic FETs with organic semiconductor channel, gate dielectric, and electrodes having a capability of sensing infrared (IR) radiation and mechanical strain. The key component of our device design is to integrate the poly(vinylidene fluoride-triflouroethylene) (P(VDF-TrFE) co-polymer directly into transparent and flexible OFETs as a multi-functional dielectric layer, which has both piezoelectric and pyroelectric properties. The P(VDF-TrFE) co-polumer gate dielectric has a high sensitivity to the wavelength regime over 800 nm. In particular, wavelength variations of P(VDF-TrFE) molecules coincide with wavelength range of IR radiation from human body (7000 nm ~14000 nm) so that the devices are highly sensitive with IR radiation of human body. Devices were examined by measuring IR light response at different powers. After that, we continued to measure IR response under various bending radius. AC (alternating current) gate biasing method was used to separate the response of direct pyroelectric gate dielectric and other electrical parameters such as mobility, capacitance, and contact resistance. Experiment results demonstrate that the tf-OTFT with high sensitivity to IR radiation can be applied for IR sensors.

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Transparent Oxide Thin Film Transistors with Transparent ZTO Channel and ZTO/Ag/ZTO Source/Drain Electrodes

  • Choi, Yoon-Young;Choi, Kwang-Hyuk;Kim, Han-Ki
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.127-127
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    • 2011
  • We investigate the transparent TFTs using a transparent ZnSnO3 (ZTO)/Ag/ZTO multilayer electrode as S/D electrodes with low resistivity of $3.24{\times}10^{-5}$ ohm-cm, and high transparency of 86.29% in ZTO based TFTs. The Transparent TFTs (TTFTs) are prepared on glass substrate coated 100 nm of ITO thin film. On atomic layer deposited $Al_2\;O_3$, 50 nm ZTO layer is deposited by RF magnetron sputtering through a shadow mask for channel layer using ZTO target with 1 : 1 molar ratio of ZnO : $SnO_2$. The power of 100W, the working pressure of 2mTorr, and the gas flow of Ar 20 sccm during the ZTO deposition. After channel layer deposition, a ZTO (35 nm)/Ag (12 nm)/ZTO(35 nm) multilayer is deposited by DC/RF magnetron sputtering to form transparent S/D electrodes which are patterned through the shadow mask. Devices are annealed in air at 300$^{\circ}C$ for 30 min following ZTO deposition. Using UV/Visible spectrometer, the optical transmittances of the TTFT using ZTO/Ag/ ZTO multilayer electrodes are compared with TFT using Mo electrode. The structural properties of ZTO based TTFT with ZTO/Ag/ZTO multilayer electrodes are analyzed by high resolution transmission electron microscopy (HREM) and X-ray photoelectron spectroscopy (XPS). The transfer and output characterization of ZTO TTFTs are examined by a customized probe station with HP4145B system in are.

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Flexibility Improvement of InGaZnO Thin Film Transistors Using Organic/inorganic Hybrid Gate Dielectrics

  • Hwang, B.U.;Kim, D.I.;Jeon, H.S.;Lee, H.J.;Lee, N.E.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.341-341
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    • 2012
  • Recently, oxide semi-conductor materials have been investigated as promising candidates replacing a-Si:H and poly-Si semiconductor because they have some advantages of a room-temperature process, low-cost, high performance and various applications in flexible and transparent electronics. Particularly, amorphous indium-gallium-zinc-oxide (a-IGZO) is an interesting semiconductor material for use in flexible thin film transistor (TFT) fabrication due to the high carrier mobility and low deposition temperatures. In this work, we demonstrated improvement of flexibility in IGZO TFTs, which were fabricated on polyimide (PI) substrate. At first, a thin poly-4vinyl phenol (PVP) layer was spin coated on PI substrate for making a smooth surface up to 0.3 nm, which was required to form high quality active layer. Then, Ni gate electrode of 100 nm was deposited on the bare PVP layer by e-beam evaporator using a shadow mask. The PVP and $Al_2O_3$ layers with different thicknesses were used for organic/inorganic multi gate dielectric, which were formed by spin coater and atomic layer deposition (ALD), respectively, at $200^{\circ}C$. 70 nm IGZO semiconductor layer and 70 nm Al source/drain electrodes were respectively deposited by RF magnetron sputter and thermal evaporator using shadow masks. Then, IGZO layer was annealed on a hotplate at $200^{\circ}C$ for 1 hour. Standard electrical characteristics of transistors were measured by a semiconductor parameter analyzer at room temperature in the dark and performance of devices then was also evaluated under static and dynamic mechanical deformation. The IGZO TFTs incorporating hybrid gate dielectrics showed a high flexibility compared to the device with single structural gate dielectrics. The effects of mechanical deformation on the TFT characteristics will be discussed in detail.

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Reduced Graphene Oxide Field Effect Transistor for Detection of H+ Ions and Their Bio-sensing Application

  • Sohn, Il-Yung;Kim, Duck-Jin;Yoon, Ok-Ja;Tien, N.T.;Trung, T.Q.;Lee, N.E.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.195-195
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    • 2012
  • Recently, graphene based solution-gated field-effect transistors (SGFETs) have been received a great attention in biochemical sensing applications. Graphene and reduced graphene oxide (RGO) possess various advantages such as high sensitivity, low detection limit, label-free electrical detection, and ease of fabrication due to their 2D nature and large sensing area compared to 1D nanomaterials- based nanobiosensors. Therefore, graphene or RGO -based SGFET is a good potential candidate for sensitive detection of protons (H+ ions) which can be applied as the transducer in various enzymatic or cell-based biosensing applications. However, reports on detection of H+ ions using graphene or RGO based SGFETs have been still limited. According to recent reports, clean graphene grown by CVD or exfoliation is electrochemically insensitive to changes of H+ concentration in solution because its surface does not have terminal functional groups that can sense the chemical potential change induced by varying surface charges of H+ on CVD graphene surface. In this work, we used RGO -SGFETs having oxygen-containing functional groups such as hydroxyl (OH) groups that effectively interact with H+ ions for expectation of increasing pH sensitivity. Additionally, we also investigate RGO based SGFETs for bio-sensing applications. Hydroloytic enzymes were introduced for sensing of biomolecular interaction on the surface of RGO -SGFET in which enzyme and substrate are acetylcholinesterase (AchE) and acetylcholine (Ach), respectively. The increase in H+ generated through enzymatic reaction of hydrolysis of Ach by AchE immobilized on RGO channel in SGFET could be monitored by the change in the drain-source current (Ids).

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Hybrid complementary circuits based on organic/inorganic flexible thin film transistors with PVP/Al2O3 gate dielectrics

  • Kim, D.I.;Seol, Y.G.;Lee, N.E.;Woo, C.H.;Ahn, C.H.;Ch, H.K.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.479-479
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    • 2011
  • Flexible inverters based on complementary thin-film transistor (CTFTs) are important because they have low power consumption and other advantages over single type TFT inverters. In addition, integrated CTFTs in flexible electronic circuits on low-cost, large area and mechanically flexible substrates have potentials in various applications such as radio-frequency identification tags (RFIDs), sensors, and backplanes for flexible displays. In this work, we introduce flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The CTFTs were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. Basic electrical characteristics of individual transistors and the whole CTFTs were measured by a semiconductor parameter analyzer (HP4145B, Agilent Technologies) at room temperature in the dark. Performance of those devices then was measured under static and dynamic mechanical deformation. Effects of cyclic bending were also examined. The voltage transfer characteristics (Vout- Vin) and voltage gain (-dVout/dVin) of flexible inverter circuit were analyzed and the effects of mechanical bending will be discussed in detail.

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Improved Contact property in low temperature process via Ultrathin Al2O3 layer (Al2O3 층을 이용한 저온공정에서의 산화물 기반 트랜지스터 컨택 특성 향상)

  • Jeong, Seong-Hyeon;Sin, Dae-Yeong;Jo, Hyeong-Gyun
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2018.06a
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    • pp.55-55
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    • 2018
  • Recently, amorphous oxides such as InGaZnO (IGZO) and InZnO (IZO) as a channel layer of an oxide TFT have been attracted by advantages such as high mobility, good uniformity, and high transparency. In order to apply such an amorphous oxide TFTs to a display, the stability in various environments must be ensured. In the InGaZnO which has been studied in the past, Ga elements act as a suppressor of oxygen vacancy and result in a decreased mobility at the same time. Previous studies have been showed that the InZnO, which does not contain Ga, can achieve high mobility, but has relatively poor stability under various instability environments. In this study, the TFTs using $IZO/Al_2O_3$ double layer structure were studied. The introduction of an $Al_2O_3$ interlayer between source/drain and channel causes superior electrical characteristics and electrical stability as well as reduced contact resistance with optimally perfect ohmic contact. For the IZO and $Al_2O_3$ bilayer structures, the IZO 30nm IZO channels were prepared at $Ar:O_2=30:1$ by sputtering and the $Al_2O_3$ interlayer were depostied with various thickness by ALD at $150^{\circ}C$. The optimal sample exhibits considerably good TFT performance with $V_{th}$ of -3.3V and field effect mobility of $19.25cm^2/Vs$, and reduced $V_{th}$ shift under positive bias stress stability, compared to conventional IZO TFT. The enhanced TFT performances are closely related to the nice ohmic contact properties coming from the defect passivation of the IZO surface inducing charge traps, and we will provide the detail mechanism and model via electrical analysis and transmission line method.

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The Desing of GaAs MESFET Resistive Mixer with High Linearity (선형성이 우수한 GaAs MESFET 저항성 혼합기 설계)

  • 이상호;김준수;황충선;박익모;나극환;신철재
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.10 no.2
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    • pp.169-179
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    • 1999
  • In this paper, a GaAs MESFET single-ended resistive mixer with high linearity and isolation is designed. The bias voltage of this mixer is applied only gate of GaAs MESFET to use the channel resistance. The LO is applied the gate and the RF is applied the drain through 7-pole hairpin bandpass filter to obtain the proper isolation thru LO-RF. The IF is extracted from the source with short circuit and lowpass filter. Using extracted equivalent circuits for LO and RF, conversion loss is calculated and compared with result of harmonic balance analysis. Measured conversion loss of this S-band down converter mixer is 8.2~10.5dB by considering the measured 3.0~3.4dB RF 7-pole hairpin bandpass filter loss and IP3in is 26.5dBm at Vg=-0.85~-1.0V in distortion performance.

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A New Method for Determination the Parasitic Extrinsic Resistances of MESFETs and HEMTs from the Meaured S-parameters under Active Bias (측정된 S-파라미터에서 MESFET과 HEMT의 기생 저항을 구하는 새로운 방법)

  • 임종식;김병성;남상욱
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.6
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    • pp.876-885
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    • 2000
  • A new and simple method is presented for determining the parasitic resistances of MESFET and HEMT from the measured S-parameters under normal active bias without depending on additional DC measurements or iteration or optimization process. The presented method is based on the fact that the difference between source resistance(Rs) and drain resistance(Rd) can be obtained from the measured Z-parameters under zero bias condition. It is possible to define the new internal device including intrinsic device and 3 parasitic resistances by elimination the parasitic inductances and capacitances from the measured S-parameters. Three parasitic resistances are calculated easily from the fact that the real parts of Yint,11 and Yint,12 of intrinsic Y-parameters are zero theoretically and the relations between S-,Z-, Y-matrices. The calculated parasitic resistances using the presented method and successively calculated equivalent circuit parameters give modeled S-parameters which are in good agreement with the measured S-parameters up to 400Hz.

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Analysis of Dopant dependence in Ni-Silicide for Sub-l00 nm CMOS Technology (100nm 이하 CMOS 소자의 Source/Drain dopant 종류에 따른 Nickel silicide의 특성분석)

  • Bae, Mi-Suk;Kim, Yong-Goo;Ji, Hee-Hwan;Lee, Hun-Jin;Oh, Soon-Young;Yun, Jang-Gn;Park, Sung-Hyung;Wang, Jin-Suk;Lee, Hi-Deok
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.11a
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    • pp.198-201
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    • 2002
  • In this paper, the dependence of Ni-silicide properties such as sheet resistance and cross-sectional profile on the dopants have been characterized. There was little dependence of sheet resistance on the used dopants such as As, P, $BF_{2}$ and $B_{11}$ just after RTP (Rapid Thermal Process). However, the silicide properties showed strong dependence on the dopants when thermal treatment was applied after formation of Ni-silicide. $BF_{2}$ implanted sample shows the best stable property, while $B_{11}$ implanted one was thermally unstable. The main reason of the excellent property of $BF_{2}$ sample is believed to be the retardation of Ni diffusion by the flourine.

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열처리 온도 및 시간에 따른 ZTO TFT의 특성 변화

  • Han, Chang-Hun;Kim, Dong-Su;Choe, Byeong-Deok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.341-341
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    • 2011
  • 최근 AMOLED 구동이 가능한 소자에 대한 연구가 활발히 진행중이다. AMOLED구동 가능소자는 LTPS TFT, a-Si TFT, OTFT, Oxide TFT가 있으며 그 중에서 현재 대부분 LTPS TFT를 사용하고 있다. LTPS TFT는 높은 전자 이동도와 안정성을 가지고 있기 때문에 현재 각광 받는 AMOLED에 잘 맞는다. 하지만 LTPS TFT는 고비용, 250$^{\circ}C$ 이상의 공정온도, Substrate가 Glass, Metal로 제한 된다는 문제점이 있으며, 균일성이 낮고 현재 대면적 기술이 부족한 상태이다. 해결방안으로 AMOLED를 타겟으로 하는 Oxide TFT 기술이 떠오르고 있다. Oxide TFT는 이동도가 높고 저온공정이 가능하며 Substrate로 Plastic 기판을 사용할 수가 있어 차후에 Flexible 소자로서의 적용이 가능하다. 또한 기존의 진공장비 사용대신 용액공정이 가능하여 장비사용시간 및 절차를 단축시킬 수 있어 비용적인 유리함을 가지고 있다. Oxide TFT는 단결정 산화물과 다결정 복합 산화물 두 가지 범주를 가지고 있다. Oxide TFT의 재료물질은 ZnO, ZTO, IZO, SnO2, Ga2O3, IGO, In2O3, ITO, InGaO3(ZnO)5, a-IGZO이 있다. 본 연구에서는 산화물질 중 하나인 ZTO를 이용하여 TFT 소자를 제작하였다. 산화물 특성상 열처리 온도에 따라 형성되는 결정의 정도가 다르기 때문에 온도 및 시간 변수에 따른 ZTO의 특성변화에 초점을 맞추어 연구함으로서 최적화된 조건을 찾고자 실험을 진행하였다. 실험을 위한 기판으로 n-type wafer을 사용하였다. PE-CVD 장비를 이용하여 SiNx를 120 nm 증착하고, ZTO 용액을 spin-coating을 이용하여 channel layer을 형성하였다. 균일하게 형성된 ZTO의 결정을 위하여 200$^{\circ}C$, 300$^{\circ}C$, 400$^{\circ}C$, 500$^{\circ}C$에서 1시간, 3시간, 6시간, 10시간의 온도 및 시간 변수를 두어 공기 중에서 열처리 하였다. ZTO는 약 30 nm 두께로 형성되었다. Thermal evaporator를 이용하여 Source, Drain의 알루미늄 전극을 형성하고, wafer 뒷면에는 Silver paste를 이용하여 Gate전극을 만들었다. 제작된 소자를 dark room temperature에서 측정하였다.

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