• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.682-687
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• 2014

We have performed reverse gate bias stress tests on AlGaN/GaN-on-Si Heterostructure FETs (HFETs). The shift of threshold voltage ($V_{th}$) and the reduction of on-current were observed from the stressed devices. These changes of the device parameters were not permanent. We investigated the temporary behavior of the stressed devices by analyzing the temperature dependence of the instabilities and TCAD simulation. As the baseline temperature of the electrical stress tests increased, the changes of the $V_{th}$ and the on-current were decreased. The on-current reduction was caused by the positive shift of the $V_{th}$ and the increased resistance of the gate-to-source and the gate-to-drain access region. Our experimental results suggest that electron-trapping effect into the shallow traps in devices is the main cause of observed instabilities.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.6
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• pp.459-462
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• 2019

This work presents methods for reducing overshoot voltages across the drain-source of silicon carbide (SiC) MOSFETs in grid-connected hybrid active neutral-point-clamped (ANPC) inverters. Compared with 3-level NPC-type inverter, the hybrid ANPC inverter can realize the high efficiency. However, SiC MOSFETs conduct its switching operation at high frequencies, which cause high overshoot voltages in such devices. These overshoot voltages should be reduced because they may damage switching devices and result in electromagnetic interference (EMI). Two major strategies are used to reduce the overshoot voltages, namely, adjusting the gate resistor and using a snubber capacitor. In this paper, advantages and disadvantages of these methods will be discussed. The effectiveness of these strategies is verified by experimental results.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.9
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• pp.589-595
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• 2017

MOS-FET structured gas sensors were manufactured using MWCNTs for application as NOx gas sensors. As the gas sensors need to be heated to facilitate desorption of the gas molecules, heat dispersion plays a key role in boosting the degree of uniformity of molecular desorption. We report the desorption of gas molecules from the sensor at $150^{\circ}C$ for different sensor electrode gaps (30, 60, and $90{\mu}m$). The COMSOL analysis program was used to verify the process of heat dispersion. For heat analysis, structure of FET gas sensor modeling was proceeded. In addition, a property value of the material was used for two-dimensional modeling. To ascertain the degree of heat dispersion by FEM, the governing equations were presented as partial differential equations. The heat analysis revealed that although a large electrode gap is advantageous for effective gas adsorption, consideration of the heat dispersion gradient indicated that the optimal electrode gap for the sensor is $60{\mu}m$.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.209.2-209.2
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• 2015

Two dimensional layered materials, such as transition metal dichalcogenides (TMDs) family have been attracted significant attention due to novel physical and chemical properties. Among them, molybdenum disulfide ($MoS_2$) has novel physical phenomena such as absence of dangling bonds, lack of inversion symmetry, valley degrees of freedom. Previous studies have shown that the interface of metal/$MoS_2$ contacts significantly affects device performance due to presence of a scalable Schottky barrier height at their interface, resulting voltage drops and restricting carrier injection. In this study, we report a new device structure by using few-layer graphene as the bottom interconnections, in order to offer Schottky barrier free contact to bi-layer $MoS_2$. The fabrication of process start with mechanically exfoliates bulk graphite that served as the source/drain electrodes. The semiconducting $MoS_2$ flake was deposited onto a $SiO_2$ (280 nm-thick)/Si substrate in which graphene electrodes were pre-deposited. To evaluate the barrier height of contact, we employed thermionic-emission theory to describe our experimental findings. We demonstrate that, the Schottky barrier height dramatically decreases from 300 to 0 meV as function of gate voltages, and further becomes negative values. Our findings suggested that, few-layer graphene could be able to realize ohmic contact and to provide new opportunities in ohmic formations.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.305-308
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• 2004

We present a novel process for the ultra low temperature (<150$^{\circ}C$) polycrystalline silicon (ULTPS) TFT for the flexible display applications on the plastic substrate. The sequential lateral solidification (SLS) was used for the crystallization of the amorphous silicon film deposited by rf magnetron sputtering, resulting in high mobility polycrystalline silicon (poly-Si) film. The gate dielectric was composed of thin $SiO_2$ formed by plasma oxidation and $Al_2O_3$ deposited by plasma enhanced atomic layer deposition. The breakdown field of gate dielectric on poly-Si film showed above 6.3 MV/cm. Laser activation reduced the source/drain resistance below 200 ${\Omega}$/ㅁ for n layer and 400 ${\Omega}$/ㅁ for p layer. The fabricated ULTPS TFT shows excellent performance with mobilities of 114 $cm^2$/Vs (nMOS) and 42 $cm^2$/Vs (pMOS), on/off current ratios of 4.20${\times}10^6$ (nMOS) and 5.7${\times}10^5$ (PMOS).

• Proceedings of the KIEE Conference
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• 1991.11a
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• pp.286-289
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• 1991

We simulated ion implantation and annealing condition of 1 ${\mu}m$ CMOS device using process simulator, SUPREM-II. In this simulation, optimal condition of ion implantation for symmetric threshold voltage determination of PMOS and NMOS region, junction depth and sheet resistance of source/drain region, impurity profile of each region are investigated. Ion implantation dose for 3 ${\mu}m$ N-well junction depth and symmetric threshold voltage of $|0.6|{\pm}0.1$ V were $1.9E12Cm^{-2}$(for phosphorus), $1.7E122Cm^{-2}$(for boron) respectively. Also annealing condition for dopant activation are examined about $900^{\circ}C$, 30 minutes. After final process step, N-well junction, P+ S/D junction and N+ S/D junction depth are calculated 3.16 ${\mu}m$, 0.45 ${\mu}m$ and 0.25 ${\mu}m$ respectively.

• Journal of Chest Surgery
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• v.17 no.2
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• pp.257-262
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• 1984

Acute purulent pericarditis, though not common in incidence after introduction of antibiotics, is still potentially life treating isease. Since 1971, we have experienced 14 cases of acute purulent pericarditis with successful treatment. Among these 14 cases, 9 cases were male and they had high occurrence on their third to fifth decades in age distribution. Isolation of causative organisms were obtained in 11 cases through the bacterial culture of infectious source which was mainly pericardial effusion or blood, and the most frequently recovered organism was the staphylococcus aureus. Pre-existing inflammatory disease preceding to pericarditis, named as antecedent disease, were proved in 12 cases, and among which contiguous extension from the intrathoracic infection such as pneumonia or empyema accounted for the majority of antecedent disease. Pericardiocentesis with administration of antibiotics were tried in all cases, but result in recovery in 1 patient only. Remaining 13 cases had persistent picture of pericarditis and necessitated surgical drainage procedure. Ten of these 13 cases were underwent the open pericardial window using a mode of anterior approach in 4 and subxiphoid approach in 6 cases respectively. Two cases of subxiphoid group were reoperated by the anterior interphrenic pericardiectomy, due to insufficient drain of too thick effusion. In remaining 3 cases, anterior interphrenic pericardiectomy was performed initially because of purulent effusion already changed into fibrinopurulent peel with thickened pericardium. Through the experience of this series, we recommended that pericardiectomy should not be reluctant in purulent pericarditis as a initial surgical procedure for advantage of complete removal of infected space and avoidance of late constrictive pericarditis.

• Journal of The Korean Society of Agricultural Engineers
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• v.47 no.7
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• pp.57-66
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• 2005

The Hydrological Simulation Program - FORTRAN (HSPF) was modified to simulate nonpoint pollutant loadings from paddy fields using a field experimental data collected during 2001-2002. The concept of a 'dike height' was added in a modified HSPF code, named HSPF-Paddy, to consider the function of retaining water by a weir at the field outlet. The effect of fertilization on the variances of nutrients on the soil surface and shallow soil layer was described mathematically with a Dirac delta function (or first-order kinetics). As confirmed through model verification, the HSPF-Paddy modifications were shown to represent the function of retaining water, varied ponded water, and surface runoff by forced drain during both rainy and non-rainy seasons and reasonably predicted the water balance and nutrients behavior in paddy fields. It is a distributed watershed model which, with the paddy modifications, can now simulate nonpoint pollutant loadings where paddy fields are dominant, and it can be used to evaluate the effects of paddy fields on the water quality at a basin scale, and assess the impacts of proposed BMPs applied to paddy fields.

• Transactions on Electrical and Electronic Materials
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• v.9 no.4
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• pp.169-172
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• 2008

We attempted to fabricate carbon nanotube field effect transistor (CNT-FET) using single walled carbon nanotube(SWNT) on the heavily doped Si substrate used as a bottom gate, source and drain electrode were fabricated bye-beam lithography on the 500 nm thick $SiO_2$ gate dielectric layer. We investigated electrical and physical properties of this CNT-FET using Scanning Probe Microscope(SPM) and conventional method based on tungsten probe tip technique. The gate length of CNT-FET was 600 nm and the diameter of identified SWNT was about 4 nm. We could observed gating effect and typical p-MOS property from the obtained $V_G-I_{DS}$ curve. The threshold voltage of CNT-FET is about -4.6V and transconductance is 47 nS. In the physical aspect, we could identified SWNT with phase mode of SPM which detecting phase shift by force gradient between cantilever tip and sample surface.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.3-4
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• 2006

본 논문에서는 nano-scale CMOSFET을 위해 Boron Cluster ($B_{18}H_{22}$)가 이온주입된 SOI 와 Bulk 기판들 이용하였으며 실리사이드의 열 안정성 개선을 위해 Ni-V을 증착한 것과 순수 Ni을 증착한 것을 비교 분석 하였다. 결과 SOI위에 Ni-V을 증착한 것이 제일 낮은 면 저항을 보여주었고 반대로 Bulk위에는 제일 높은 면 저항을 보여 주었다. 단면을 측정한 결과 SOI 위에 Ni-V을 증착한 동일 조건의 Ni보다 Silicide의 두께가 두껍게 형성된 것을 확인하였다.