• Proceedings of the KSR Conference
• /
• 2006.11b
• /
• pp.1468-1476
• /
• 2006

The goal of this thesis is to support safety and reliability characteristics of software intensive critical systems. The verification method developed is innovative from current state of the art in what concerns the verification viewpoint adopted: focusing on software faults, and not, like many other approaches purely on fulfilling functional requirements. As a first step and based on a number of well defined criteria a comparison was made of available literature in the area of static non formal non probabilistic software fault removal techniques. But, None of the techniques evaluated fulfilled all criteria set in isolation. Therefore a new technique was developed based on a combination of two existing techniques: the FMEA and FTA. These two techniques complement each other very well. It is possible to integrate both techniques with commonly used techniques at system level. The resulting new technique can be shown to combine nearly all aspects of existing fault removal techniques.

• Journal of the Korea Society of Computer and Information
• /
• v.20 no.10
• /
• pp.15-21
• /
• 2015

In this paper, we propose a stable automatic signature verification algorithm applicable to various smart devices. The proposed algorithm uses real and forgery data all together, which can improve the verification rate dramatically. As a tool for signature acquisition in a smart device, two applications, one using touch with a finger and the other using a pressure-sensing-stylus pen, are developed. The verification core is based on SVM and some modifications are made to include the characteristics of signatures. As shown in experimental results, the minimum error rate was 1.84% in the SVM based method, which can easily defeat 4.38% error rate with the previous parametric approach. Even more, 2.43% error rate was achieved with the features excluding pressure-related features, better than the previous approach including pressure-related features and only about 0.6% more error than the best result, which means that the proposed algorithm can be applied to a smart device with or without pressure-sensing-stylus pens and used for security purposes.

• Journal of the Korea Institute of Military Science and Technology
• /
• v.10 no.1
• /
• pp.55-69
• /
• 2007

The paper provides the approach to apply formal methods to the development and certification criteria of defense safety/security-critical software. RTCA/DO-178B is recognized as a do facto international standard for airworthiness certification but lack of concrete activities and vagueness of verification/certification criteria have been criticized. In the case of MoD Def Stan 00-55, the guidelines based on formal methods are concrete enough and structured for the defense safety-related software. Also Common Criteria Evaluation Assurance Level includes the strict requirements of formal methods for the certification of high-level security software. By analyzing the problems of DO-178B and comparing it with MoD Def Stan 00-55 and Common Criteria, we identity the important issues In safety and security space. And considering the identified issues, we carry out merging of DO-178B and CC EAL7 on the basis of formal methods. Also the actual case studies for formal methods applications are shown with respect to the verification and reuse of software components.

• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.42 no.5
• /
• pp.398-405
• /
• 2014

Recently the embedded software has been widely applied to the safety-critical systems in aviation and defense industries, therefore, the higher level of reliability, availability and fault tolerance has become a key factor for its implementation into the systems. The integrity of the software can be verified using the static analysis tools. And recent developed static analysis tool can evaluate code integrity through the mathematical analysis method. In this paper we detect the autocode error and violation of coding rules using the formal verification tool, Polyspace(R). And the fundamental errors on the flight control law model have been detected and corrected using the formal verification results. As a result of verification process, FBW helicopter control law autocode can ensure code integrity.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.21 no.12
• /
• pp.2298-2304
• /
• 2017

Online signature verification is one of the simple and efficient method of identity verification and has less resistance than other biometric technologies. In training to build a verification model, negative samples are required to build the model, but in most practical applications it is not easy to get negative samples - forgery signatures. In this paper, proposed is a method using someone else's signatures as negative samples. In verification, shape-based features extracted from the time-sequenced signature data are extracted and a support vector machine is used to verify. SVM tries to map a feature vector to a high dimensional space and to draw a linear boundary in the high dimensional space. SVM is one of the best classifiers and has been applied to various applications. Using general handwriting data, i.e., someone else's signatures which have little in common with positive samples improved the verification rate experimentally, which means that signature verification without negative samples is possible.

• ETRI Journal
• /
• v.30 no.1
• /
• pp.141-151
• /
• 2008

In this paper, we introduce a new verification platform with ARM- and DSP-based multiprocessor architecture. Its simple communication interface with a crossbar switch architecture is suitable for a heterogeneous multiprocessor platform. The platform is used to verify the function and performance of a DVB-T baseband receiver using hardware and software partitioning techniques with a seamless hardware/software co-verification tool. We present a dual-processor platform with an ARM926 and a Teak DSP, but it cannot satisfy the standard specification of EN 300 744 of DVB-T ETSI. Therefore, we propose a new multiprocessor strategy with an ARM926 and three Teak DSPs synchronized at 166 MHz to satisfy the required specification of DVB-T.

• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.57 no.2
• /
• pp.65-71
• /
• 2008

Recently, many critical control systems are developed using formal methods. When software applied to such systems is developed, the employment of formal methods in the software requirements specification and verification will provide increased. assurance for such applications. Earlier error of overlooked requirement specification can be detected using formal specification method. Also the testing and full verification to examine all reachable states using model checking to undertake formal verification are able to be completed. In this paper, we propose an eclectic approach to incorporate Z(Zed) formal language and 'Statemate MAGNUM' which is formal method tools using Statechart for applying to the railway signaling systems.

• Journal of Electrical Engineering and Technology
• /
• v.4 no.1
• /
• pp.87-92
• /
• 2009

Many critical control systems are developed using formal methods. When software applied to such systems is developed, the employment of formal methods in the software requirements specification and verification will provide increased assurance for such applications. Earlier errors of overlooked requirement specification can be detected using the formal specification method. Also, the testing and full verification to examine all reachable states using model checking to undertake formal verification are able to be completed. In this paper, we proposed an eclectic approach to incorporate Z(Zed) formal language and 'Statemate MAGNUM', formal method tools using Statechart. Also we applied the proposed method to train control systems for the formal requirement specification and analyzed the specification results.

• International Journal of Computer Science & Network Security
• /
• v.24 no.4
• /
• pp.192-196
• /
• 2024

The memory coherence problem occurs while mapping shared virtual memory in a loosely coupled multiprocessors setup. Memory is considered coherent if a read operation provides same data written in the last write operation. The problem is addressed in the literature using different algorithms. The big question is on the correctness of such a distributed algorithm. Formal verification is the principal term for a group of techniques that routinely use an analysis that is established on mathematical transformations to conclude the rightness of hardware or software behavior in divergence to dynamic verification techniques. This paper uses UPPAAL model checker to model the dynamic distributed algorithm for shared virtual memory given by K.Li and P.Hudak. We analyse the mechanism to keep the coherence of memory in every read and write operation by using a dynamic distributed algorithm. Our results show that the dynamic distributed algorithm for shared virtual memory partially fulfils its functional requirements.

• Journal of Institute of Control, Robotics and Systems
• /
• v.14 no.8
• /
• pp.824-836
• /
• 2008

Relaxed static stability(RSS) concept has been applied to improve aerodynamic performance of modern version supersonic jet fighter aircraft. Therefore, flight control systems are necessary to stabilize an unstable aircraft, and provides adequate handling qualities and achieve performance enhancements. Standard FCSDVP (Flight Control System Design and Verification Process) is provided to reduce development period of the flight control system. In addition, if this process is employed in developing flight control system, it reduces the trial and error for development and verification of flight control system. This paper addresses the flight control system design and verification process for the RSS aircraft utilizing design goal based on military specifications, linear and nonlinear system design and verification based on universal software, handling quality test based on HILS(Hardware In-the-Loop Simulator) environment, and ground and flight test results to verify aircraft dynamic flight responses.