• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.11C
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• pp.148-156
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• 2001

This paper proposed embedded application-specific microprocessor(YS-RDSP) whose structure has an additional DSP processor on chip. The YS-RDSP can execute maximum four instructions in parallel. To make program size shorter, 16-bit and 32-bit instruction lengths are supported in YS-RDSP. The YS-RDSP provides programmability. controllability, DSP processing ability, and includes eight-kilobyte on-chip ROM and eight-kilobyte RAM. System controller on the chip gives three power-down modes for low-power operation, and SLEEP instruction changes operation statue of CPU core and peripherals. YS-RDSP processor was implemented with Verilog HDL on top-down methodology, and it was improved and verified by cycle-based simulator written in C-language. The verified model was synthesized with 0.7um, 3.3V CMOS standard cell library, and the layout size was 10.7mm78.4mm which was implemented by using automatic P&R software.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.9
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• pp.1115-1124
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• 1988

A two-dimensional systolic array for fast Fourier transform, which has a regular and recursive VLSI architecture is presented. The array is constructed with identical processing elements (PE) in mesh type, and due to its modularity, it can be expanded to an arbitrary size. A processing element consists of two data routing units, a butterfly arithmetic unit and a simple control unit. The array computes FFT through three procedures` I/O pipelining, data shuffling and butterfly arithmetic. By utilizing parallelism, pipelining and local communication geometry during data movement, the two-dimensional systolic array eliminates global and irregular commutation problems, which have been a limiting factor in VLSI implementation of FFT processor. The systolic array executes a half butterfly arithmetic based on a distributed arithmetic that can carry out multiplication with only adders. Also, the systolic array provides 100% PE activity, i.e., none of the PEs are idle at any time. A chip for half butterfly arithmetic, which consists of two BLC adders and registers, has been fabricated using a 3-um single metal P-well CMOS technology. With the half butterfly arithmetic execution time of about 500 ns which has been obtained b critical path delay simulation, totla FFT execution time for 1024 points is estimated about 16.6 us at clock frequency of 20MHz. A one-PE chip expnsible to anly size of array is being fabricated using a 2-um, double metal, P-well CMOS process. The chip was layouted using standard cell library and macrocell of BLC adder with the aid of auto-routing software. It consists of around 6000 transistors and 68 I/O pads on 3.4x2.8mm\ulcornerarea. A built-i self-testing circuit, BILBO (Built-In Logic Block Observation), was employed at the expense of 3% hardware overhead.

• Journal of dental hygiene science
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• v.18 no.3
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• pp.137-146
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• 2018

This systematic review aimed to investigate the effects of periodontal treatment on glycated hemoglobin A (HbA1c) levels in patients with type 2 diabetes who develop periodontal disease. The search of the MEDLINE, Embase, CINAHL, and Cochrane Library databases was completed on April 8, 2018. The study design was based on randomized clinical trials. Scaling and root planing was performed for the test group, whereas no periodontal treatment or simple oral training was performed for the control group. The main outcome variable was the change in HbA1c levels. We used the Review Manager statistical analysis software for the quantitative analysis of selected documents. Meta-analysis was performed using the inverse variance estimation method of the fixed-effect model to estimate the effects of periodontal treatment on HbA1c levels in patients with type 2 diabetes. A total of 1,011 documents were searched using search strategies, and 10 documents were included in the meta-analysis. The meta-analysis of the selected literature showed that periodontal treatment significantly reduced the HbA1c levels in patients with type 2 diabetes who develop periodontal disease (mean difference, -0.34; 95% confidence interval, -0.43 to -0.26; p<0.001). This study aimed to investigate the effects of periodontal treatment on HbA1c levels, which can be used as a basis for the increasing management of diabetic complications. To improve the quality of life and reduce the burden of medical expenses for patients with diabetes, periodontal disease management through nonsurgical periodontal treatment, such as scaling and root planing, is necessary.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.13 no.4
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• pp.91-97
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• 2013

A finger-gesture remote controller using the single camera is implemented in this paper, which is base on the recognition of finger number and finger moving direction. Proposed method uses the transformed YCbCr color-difference information to extract the hand region effectively. The number and position of finger are computer by using a double circle tracing method. Specially, a user continuous-command can be performed repeatedly by recognizing the finger-gesture direction of single shape. The position information of finger enables a user command to amplify a same command in the User eXperience. Also, all processing tasks are implemented by using the Intel OpenCV library and C++ language. In order to evaluate the performance of the our proposed method, after applying to the commercial video player software as a remote controller. As a result, the proposed method showed the average 89% recognition ratio by the user command-mode.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.124-129
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• 2013

This paper proposes a high-performance vector inner product calculation circuit for real-time object recognition based on SVM algorithm. SVM algorithm shows a higher detection rate than other object recognition algorithms. However, it requires a huge amount of computational efforts. Since vector inner product calculation is one of the major operations of SVM algorithm, it is important to implement a high-performance vector inner product calculation circuit for real-time object recognition capability. The proposed circuit adopts the pipeline architecture with six stages to increase the operating speed and makes it possible to recognize objects in real time based on SVM. The proposed circuit was described in Verilog HDL at RTL. For silicon verification, an MPW chip was fabricated using TSMC 180nm standard cell library. The operation of the implemented MPW chip was verified on the test board with test application software developed for the chip verification.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.1
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• pp.109-116
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• 2018

This paper describes an area-efficient design of SHA-256 hash function that is widely used in various security protocols including digital signature, authentication code, key generation. The SHA-256 hash processor includes a padder block for padding and parsing input message, so that it can operate without software for preprocessing. Round function was designed with a 16-bit data-path that processed 64 round computations in 128 clock cycles, resulting in an optimized area per throughput (APT) performance as well as small area implementation. The SHA-256 hash processor was verified by FPGA implementation using Virtex5 device, and it was estimated that the throughput was 337 Mbps at maximum clock frequency of 116 MHz. The synthesis for ASIC implementation using a $0.18-{\mu}m$ CMOS cell library shows that it has 13,251 gate equivalents (GEs) and it can operate up to 200 MHz clock frequency.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.12C
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• pp.1193-1200
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• 2005

In this paper, we proposed an image hiding method which decreases the amount of calculation encrypting partial data rather than the whole image data using a discrete wavelet transform and a linear scalar quantization which have been adopted as the main technique in JPEG2000 standard and then implemented the proposed algorithm to hardware. A chaotic system was used instead of encryption algorithms to reduce further amount of calculation. It uses a method of random changing method using the chaotic system of the data in a selected subband. For ciphering the quantization index it uses a novel image encryption algorithm of cyclical shifting to the right or left direction and encrypts two quantization assignment method (Top-down coding and Reflection coding), made change of data less. The experiments have been performed with the proposed methods implemented in software for about 500 images. The hardware encryption system was synthesized to find the gate-level circuit with the Samsung $0.35{\mu}m$ Phantom-cell library and timing simulation was performed, which resulted in the stable operation in the frequency above 100MHz.

• Journal of Advanced Marine Engineering and Technology
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• v.40 no.10
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• pp.906-915
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• 2016

In this study, a network monitoring system, including a secure 460-Network and a 460-Gateway, is designed and developed according with the requirements of the IEC (International Electro-Technical Commission) 61162-460 network standard for the safety and security of networks on board ships. At present, internal or external unauthorized access to or malicious attack on a ship's on board systems are possible threats to the safe operation of a ship's network. To secure the ship's network, a 460-Network was designed and implemented by using a 460-Switch, 460-Nodes, and a 460-Gateway that contains firewalls and a DMZ (Demilitarized Zone) with various application servers. In addition, a 460-firewall was used to block all traffic from unauthorized networks. 460-NMS (Network Monitoring System) is a network-monitoring software application that was developed by using an simple network management protocol (SNMP) SharpNet library with the .Net 4.5 framework and a backhand SQLite database management system, which is used to manage network information. 460-NMS receives network information from a 460-Switch by utilizing SNMP, SNMP Trap, and Syslog. 460-NMS monitors the 460-Network load, traffic flow, current network status, network failure, and unknown devices connected to the network. It notifies the network administrator via alarms, notifications, or warnings in case any network problem occurs. Once developed, 460-NMS was tested both in a laboratory environment and for a real ship network that had been installed by the manufacturer and was confirmed to comply with the IEC 61162-460 requirements. Network safety and security issues onboard ships could be solved by designing a secure 460-Network along with a 460-Gateway and by constantly monitoring the 460-Network according to the requirements of the IEC 61162-460 network standard.

• Korean Journal of Medicinal Crop Science
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• v.24 no.2
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• pp.93-100
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• 2016

Background: A set of logical criteria that can accurately identify and verify the cultivation region of raw materials is a critical tool for the scientific management of traditional herbal medicine. Methods and Results: Volatile compounds were obtained from 19 and 32 samples of Angelica gigas Nakai cultivated in Korea and China, respectively, by using steam distillation extraction. The metabolites were identified using GC/MS by querying against the NIST reference library. Data binning was performed to normalize the number of variables used in statistical analysis. Multivariate statistical analyses, such as Principal Component Analysis (PCA), Partial Least Squares-Discriminant Analysis (PLS-DA), and Orthogonal Partial Least Squares-Discriminant Analysis (OPLS-DA) were performed using the SIMCA-P software. Significant variables with a Variable Importance in the Projection (VIP) score higher than 1.0 as obtained through OPLS-DA and those that resulted in p-values less than 0.05 through one-way ANOVA were selected to verify the marker compounds. Among the 19 variables extracted, styrene, ${\alpha}$-pinene, and ${\beta}$-terpinene were selected as markers to indicate the origin of A. gigas. Conclusions: The statistical model developed was suitable for determination of the geographical origin of A. gigas. The cultivation regions of six Korean and eight Chinese A. gigas. samples were predicted using the established OPLS-DA model and it was confirmed that 13 of the 14 samples were accurately classified.

• Journal of Navigation and Port Research
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• v.35 no.6
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• pp.489-494
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• 2011

Present study introduces an implementation of product data management (PDM) that can be applied to the design of ship propulsion system. The PDM system is developed based on both object oriented software development environment and Open Scene Graph (OSG) library while the system architecture is modeled by the unified modeling language (UML). Suggested PDM system also integrates the modeling & simulation components required to estimate the performance of ship propulsion system as the product information is represented based on the 3-dimensional digital mock-up (DMU). Finally, functions of the implemented PDM system that is integrated with the M&S softwares are illustrated in order to suggest a practical guidance for the efficient design of ship propulsion system.