• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.11
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• pp.2009-2014
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• 2017

A novel structure of phase locked loop (PLL) with a time constant comparator and a current compensator has been proposed. The proposed PLL uses small capacitors which are impossible for stable operation in a conventional PLL. It is small enough to be integrated into a single chip. The time constant comparator detects the loop filter output voltage variations using signals which are passed through small and large RC time constants. The signal from the large RC time constant node is the average of the loop filter output voltage. The output voltage of another node is approximately equal to the present loop filter voltage. The output of the time constant comparator controls a current compensator and charge/discharge small size loop filter capacitors. It makes the proposed PLL operate stably. It has been simulated and proved by HSPICE in a CMOS $0.18{\mu}m$ 1.8V process.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1993.10a
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• pp.83-88
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• 1993

Recently, the analysis of microcutting with submicrometer depth of cut is tried to get a more high quality surface product, but to get a valuable result another method instead of conventional finite element method must be considered because finite elment method is impossible for a very small focused region and mesh size. As the altermative method, Molecular Dynamics or Statics is suggested and acceoted in the field of microcutting, indentation and crack propagation. In this paper using Molecuar Dynamics simulation, the phenomena of microcutting with subnanometer chip thickness is studied and the cutting mechanism for tool edge configuration is evaluated. As the result of simulation the atomistic chip formation is achieved.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.13 no.4
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• pp.30-36
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• 2004

The development of LD(Laser Diode) tester and its control system based on the graphical programming language(LabVIEW) is addressed. The ill tester is used to check the optic power and the optic spectrum of the LD Chip. The emitter size of LD chip and the diameter of the Detector(optic fiber and photo diode) are very small, therefore the test device needs high accuracy. But each motion part of the test device could not accomplish high accuracy due to the limit of the mechanical performance. So, an image processing with machine vision is proposed to compensate for the error. By adopting our method we can reduce the error of position within $\pm$5$\mu\textrm{m}$.

• Proceedings of the KIEE Conference
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• 2006.07d
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• pp.2051-2052
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• 2006

본 연구는 HHP,PDA,PMP,CNS 등등에 사용되는 중소형 A-Si:H TFT LCD 에서의 Automatic Gamma Correction 적용으로 화질 최적화 구현에 좀 더 쉽고 빠르게 접근하게 되었다. Analog Gamma String 대신 1chip Drive IC에 집적된 Gamma resister Ladder를 A-Si:H TFT-LCD Panel 특성에 보다 정확하게 적용시키기 위해 새로운 알고리즘을 개발 했으며 이를 적용시킨 회로를 Test Board로 실제 구현해서 최종결과를 도출하였다. Kick-Rack 전압을 고려한 Asymmetry-Gamma Correction 구현까지 Automatic으로 1chip Drive IC의 Register를 산출 할 수 있도록 알고리즘을 구성했다.

• Journal of information and communication convergence engineering
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• v.8 no.5
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• pp.534-538
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• 2010

Efficient control of a marine engine requires an engine control unit (ECU) system that handles fast and precise signal processes for in-coming and out-going signals from fast running engines. In order to handle these roles, the sequential control has been adapted in the ECU system in small and medium size ship engines, which has caused high production cost and complexity of the system. Hence, this paper is focused on developing an distributed ECU system for high speed and high precision control of a marine engine by efficiently combining a CPLD chip and a microprocessor. By sharing load at the MCU with the designed CPLD chip, we could achieve in driving a marine engine with high speed and precise control so that the ECU board has been simplified and its production cost has been reduced.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.3
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• pp.207-212
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• 2013

A new CMOS voltage-bias differential LC voltage-controlled oscillator (LC-VCO) with active source degeneration is proposed. The proposed degeneration technique preserves the quality factor of the LC-tank which leads to improvement in phase noise of VCO oscillators. The proposed VCO shows the high figure of merit (FOM) with large tuning range, low power, and small chip size compared to those of conventional voltage-bias differential LC-VCO. The proposed VCO implemented in 0.18-${\mu}m$ CMOS shows the phase noise of -118 dBc/Hz at 1 MHz offset oscillating at 5.03 GHz, tuning range of 12%, occupies 0.15 $mm^2$ of chip area while dissipating 1.44 mW from 0.8 V supply.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.859-862
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• 2003

This paper proposes an emulation environment for SoC designs using small number of large gate-count FPGA's and a PC system. To overcome the pin limitation problem in partitioning the design when the design size overwhelms the FPGA gate count, we use bus splitter modules that replicate on-chip bus signals in one FPGA to arbitrary number of other FPGA's with minimal pin count. The proposed scheme is applied to the emulation of 2 million gate multimedia processing chip using two Xilinx Viretex-2 6000 FPGA devices in 6.6MHz operating frequency. An ARM core, memories, camera and LCD display are modeled in software using dual 2GHz Pentium-III processors. This scheme can be utilized for more than 2 FPGA's in the same ways as two FPGA case without losing emulation speed.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.6 no.3
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• pp.24-30
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• 2007

The FPCs(Flexible Printed Circuit) are currently used in several electronic products like digital cameras, cellular phones because of flexible material characteristics. Because the FPC is usually small size and flexible, only one FPC should not enter chip mounting process, instead, several FPCs are placed on the large rigid pallette and enter into the chip mounting process. Currently the job of mounting FPC on the pallette is carried by totally manual way. Thus, the goals of the research is develop the automatic machine of FPC mounting on pallette using vision alignment. Instead of using two cameras or using moving one camera, the proposed vision system with only one fixed camera is adopted. Moreover, the two picker heads which can handle two FPCs simultaneously are used to make process time shortened. The procedure of operation is firstly to measure alignment error of FPC, correct alignment errors, and finally mount well-aligned FPC on the pallette. The vision technology is used to measure alignment error accurately, and precision motion control is used in correcting errors and mounting FPC.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.10a
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• pp.390-393
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• 2005

he FPCs(Flexible Printed Circuit) are currently used in several electronic products like digital cameras, cellular phones because of flexible material characteristics. Because the FPC is usually small size and flexible, only one FPC should not enter chip mounting process, instead, several FPCs is placed on the large rigid pallette and go to the chip mounting process. Currently the job of mounting FPC on the pallette is carried by totally manual way. Thus, the goals of the research is develop the automatic machine of FPC mounting on pallette using vision alignment. The procedure of operating machine is firstly to measure alignment error of FPC, correct alignment errors, and finally mount well-aligned FPC on the pallette. The vision technology is used to measure alignment error accurately, and precision motion control is used in correcting errors nd mounting FPC. The two picker heads handling two FPC together is used to increase the productivity.

• Journal of the Korean Society for Precision Engineering
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• v.12 no.4
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• pp.135-142
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• 1995

Recently, the analysis of microcutting with submicrometer depth of cut is tried to get a more high quality surface product, but to get a valuable result another method instead of conventional finite element method must be considered because finite element method is impossible for a very small focused region and mesh size. As the alternative method, Molecular Dynamics or Statics is suggested and accepted in the field of microcutting, indentation and crack propagation. In this paper using Molecular Dynamics simulation, the phenomena of microcutting with subnanometer chip thickness is studied and the cutting mechanism for tool edge configuration is evaluated. As the result of simulation the atomistic chip formation is achieved.