• Animal Bioscience
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• v.34 no.7
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• pp.1123-1133
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• 2021

Objective: Shandong indigenous pig breeds are important Chinese pig resources. Their progressive population decline in recent decades has attracted attention towards their conservation. Conservation genetics of these indigenous breeds are essential for developing a conservation and utilization scheme. Methods: A high-density single nucleotide polymorphism (HD-SNP) chip-based comparative analysis of genetic characteristics was performed for seven Shandong indigenous pig breeds in the context of five Western commercial breeds. Results: The results showed that Shandong indigenous pig breeds varied greatly in genetic diversity, effective population size, inbreeding level, and genetic distance with the Western commercial breeds. Specifically, Laiwu and Dapulian displayed low genetic diversity, and had a genetically distant relationship with the Western commercial breeds (average F statistics [F_ST] value of 0.3226 and 0.2666, respectively). Contrastingly, the other five breeds (Yantai, Licha, Yimeng, Wulain, and Heigai) displayed high genetic diversity within breed and had some extent of mixture pattern with the Western commercial breeds, especially Duroc and Landrace (F_ST values from 0.1043 to 0.2536). Furthermore, intensive gene flow was discovered among the seven Shandong indigenous breeds, particularly Wulian, Licha, and Heigai, as indicated by the large cluster formed in the principal component analysis scatterplot and small population differentiation (average of 0.1253) among them. Conclusion: Our study advances the understanding of genetic characteristics of Shandong indigenous breeds and provides essential information for developing an appropriate conservation and utilization scheme for these breeds.

• Journal of IKEEE
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• v.18 no.3
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• pp.335-340
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• 2014

Recently, LED (Light Emitting Diode) becomes to be useful to apply for the lightening sources in electric systems and the lightening equipment since the power is less consumed with high efficiency, and the size and the weight of LED are small and light, respectively. The LED is controlled with constant current and SMPS (Switching Mode Power Supply). It is necessary for the LED manufacturer to secure the fundamental technology of designing LED chip, and to study the methodology to improve the power factor (PF) and to design the operational circuit for the development of LED to reduce the power loss in the application of LED lightening. The direct AC (Alternating Current) LED driving circuit, HV9910, is widely used in the industry field. In this paper, it is to evaluate the improved methodology for the power factor and efficiency through simulations when PFC (Power Factor Correction) and Noise Filter are added to HV9910.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.10
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• pp.7-13
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• 2010

A compact phase interpolator (PI) based spread spectrum clock generator (SSCG) for electromagnetic interference (EMI) reduction is presented. The proposed SSCG utilizes a digitally controlled phase interpolation technique to achieve triangular frequency modulation with less design complexity and small power and area overhead. The novel SSCG can generate the system clock with a programmable center-spread spectrum range of up to +/- 2 % at 200 MHz, while maintaining the clock duty cycle ratio without distortions. The PI-based SSCG has been designed and evaluated in 0.18-um 1.8-V CMOS technology, which consumes about 5.0 mW at 200MHz and occupies a chip size of $0.092mm^2$ including a DLL.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.9 s.100
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• pp.872-882
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• 2005

In this paper, we examined the operating principle of a passive tag antenna for RFID system in UHF band. Based on the study, we proposed a novel RFID tag antenna which adopts the inductively coupled feeding structure to match antenna impedance to a capacitively loaded commercial tag chip. The proposed tag antenna consists of microstrip lines on a thin PET substrate for low-cost fabrication. The detail structure of the tag antenna were optimized using a full electromagnetic wave simulator of IE3D in conjunction with a Pareto genetic algorithm and the size of the tag antenna can be reduced up to kr=0.27($2 cm^2$). We built some sample antennas and measured the antenna characteristics such as a return loss, an efficiency, and radiation patterns. The readable range of the tag antenna with a commercial RFID system showed about 1 to 3 m.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.12
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• pp.4984-4990
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• 2010

In this paper, a Step-down CMOS DC-DC Converter using low power switched capacitor method is designed in a 0.5 ${\mu}m$ technology for the integration of devices. Conventional DC-DC converter is used inductor that can store energy in a magnetic field but have low efficiency because power consumption is caused by magnetic flux. And there were problems with size, weight and price to integrate chip. In this paper, a proposed Inductorless step-down CMOS DC-DC converter of low power using SC method is designed in a 0.5um technology to solve these problems. Designed DC-DC converter have 96% power efficiency with 200kHz frequency by using cadence simulation.

• Journal of Sensor Science and Technology
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• v.27 no.5
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• pp.311-316
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• 2018

An antenna-coupled bolometer-type terahertz sensor was designed, fabricated, evaluated, and utilized to obtain terahertz transmission images. The sensor consists of a thin film bowtie antenna that resonates accordingly in response to an incident terahertz beam, a heater that converts the applied current in the antenna into heat, and a microbolometer that converts the rise in temperature into a change in resistance. The device is fabricated by a bulk micromachining process on a 4-inch silicon wafer. The fabricated sensor chip has a size of $2{\times}2mm$ and an active area of $0.1{\times}0.1mm^2$. The temperature coefficient of resistance (TCR) of the bolometer film (VOx) is 2.0%, which is acceptable for bolometer applications. The output sensor signal is proportional to the power of the incident terahertz beam. Transmission images were obtained with a 2-axis scanning imaging system that contained the sensor. The small active area of the sensor will enable the development of highly sensitive focal plane array sensors in terahertz imaging cameras in the future.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.11
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• pp.35-42
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• 2004

A CMOS folding ADC with transistor differential pair folding circuit for low power consumption and high speed operation is presented in this paper. This paper explains the theory of transistor differential pair folding technique and many advantages compared with conventional folding and interpolation circuits. A ADC based on transistor differential pair folding circuit uses 16 fine comparators and 32 interpolation resistors. So it is possible to achieve low power consumption, high speed operation and small chip size. Design technology is based on fully standard 0.25${\mu}{\textrm}{m}$ double poly 2 metal n-well CMOS process. A power consumption is 45mW at 2.5V applied voltage and 250MHz sampling frequency. The INL and DNL are within $\pm$0.15LSB and $\pm$0.15LSB respectively. The SNDR is approximately 50dB at 10MHz input frequency.

• Asian Pacific Journal of Cancer Prevention
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• v.15 no.17
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• pp.7443-7447
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• 2014

Aim: Little is known about the genetic associations with Basal cell carcinoma (BCC) risk in non-Caucasian populations, in which BCC is rare, as in Korea. We here conducted a pilot genome-wide association study (GWAS) in 12 patients and 48 standard controls. Method: A total of 263,511 SNPs were analyzed with the Illumina HumanOmni1 Quad v1.0 DNA Analysis BeadChip for cases and Korean HapMap 570K for controls. Results: SNP-based analyses, based on the allele genetic model with adjustment for sex and age showed suggestive associations with BCC risk for 6 SNPs with a P-value (P < 0.0005). However, these associations were not statistically significant after Bonferroni correction: rs1040503, rs2216491, rs13407683, rs4751072, rs9891263, and rs1368474. In addition, results from gene-based analyses showed suggestive associations with BCC risk for 33 candidate genes with a P-value (P <0.0005). Consistent with previous GWAS and replication studies in Caucasian populations, PADI6, RHOU and SLC45A2 were identified as having null associations with BCC (P > 0.05), likely due to the smaller sample size. Conclusions: Although this was a small-scale negative study, to our knowledge, we have conducted the first GWAS for BCC risk in an Asian population. Further large studies in non-Caucasian populations are required to achieve statistical significance and confirm these findings.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.12 s.115
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• pp.1240-1248
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• 2006

This paper presents an UHF band(911 MHz) RFID tag antenna which has near-isotropic radiation pattern and easy conjugate impedance matching characteristics to any commercial chips of usual practice through the application of an inductively-coupled feeding. The proposed antenna of compact size $40{\times}46mm\;(0.12{\times}0.14{\lambda})$ has, at normal incidence, the maximum RCS of $-18.5dBm^2$ and the 3 dB RCS bandwidth of 9 MHz(1 %) in case of short chip load. It has the maximum and minimum RCS' of $-16.9dBm^2\;and\;-21.4dBm^2$ depending on the incident angles. The difference of about 4.5 dB is relatively small compared with that (about 70 dB) of a pure dipole antenna. The designed antenna has been fabricated and its RCS' have been measured varying the angles of incidence. The measured RCS' have been found to have good agreement with the simulated ones.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.1
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• pp.63-70
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• 2015

In this paper, a receiver has been developed in a $0.11-{\mu}m$ CMOS technology for 900 MHz RFID communication system applications. The receiver is composed of an envelope detector, a low-pass-filter, a comparator, D flip-flops, as well as an oscillator to provide the clock for digital blocks. The receiver is designed for low power consumption, which would be suitable for passive RFID tags. In this circuit, a digital data slicer was employed instead of the conventional analog data slicer in order to reduce the power consumption. The clock frequency is 1.68 MHz and the circuit operates with a power consumption as small as $5{\mu}W$. The chip size is $325{\mu}m{\times}290{\mu}m$ excluding the probing pads.