• Asia-Pacific Journal of Business Venturing and Entrepreneurship
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• v.18 no.5
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• pp.91-107
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• 2023

Lean startup is a concept that combines the words "lean," meaning an efficient way of running a business, and "startup," meaning a new business. It is often cited as a strategy for minimizing failure in early-stage businesses, especially in software-based startups. By scrutinizing the case of a startup L, this study suggests that lean startup methodology(LSM) can be useful for hardware and manufacturing companies and identifies ways for early startups to successfully implement LSM. To this end, the study explained the core of LSM including the concepts of hypothesis-driven approach, BML feedback loop, minimum viable product(MVP), and pivot. Five criteria to evaluate the successful implementation of LSM were derived from the core concepts and applied to evaluate the case of startup L . The early startup L pivoted its main business model from defecation alert system for patients with limited mobility to one for infants or toddlers, and finally to a smart bottle for infants. In developing the former two products, analyzed from LSM's perspective, company L neither established a specific customer value proposition for its startup idea and nor verified it through MVP experiment, thus failed to create a BML feedback loop. However, through two rounds of pivots, startup L discovered new target customers and customer needs, and was able to establish a successful business model by repeatedly experimenting with MVPs with minimal effort and time. In other words, Company L's case shows that it is essential to go through the customer-market validation stage at the beginning of the business, and that it should be done through an MVP method that does not waste the startup's time and resources. It also shows that it is necessary to abandon and pivot a product or service that customers do not want, even if it is technically superior and functionally complete. Lastly, the study proves that the lean startup methodology is not limited to the software industry, but can also be applied to technology-based hardware industry. The findings of this study can be used as guidelines and methodologies for early-stage companies to minimize failures and to accelerate the process of establishing a business model, scaling up, and going global.

• Journal of the Korean Society of Marine Environment & Safety
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• v.27 no.7
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• pp.1124-1128
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• 2021

As regulations of emissions from ships become more stringent, electric propulsion systems have been increasingly used to solve this problem in vessels ranging from large merchant ships to small and medium-sized ships. Methods for improving the efficiency of the electric propulsion system include the improvement of power sources; the use of a system linked to environmentally friendly power sources, such as batteries, fuel cells, and solar power; and the development of hardware and control methodology for rectifiers, power conversion devices, and propulsion motors. The method using a phase-shifting transformer with diodes has been widely used for rectification. Power semiconductor devices with grid connection to an environmentally friendly power source using DC distribution, a variable speed power source, and the application of small and medium-sized electric propulsion systems have been developed. Accordingly, the demand for active front-end (AFE) rectifiers is increasing. In this study, a method using a neural network rather than a conventional proportional-integral controller was proposed to control the AFE rectifier. Tested controller data were used to design a neural network controller trained through MATLAB/Simulink. The neural network controller was applied to a rectification system designed using PSIM software. The results indicated the effectiveness of improving the waveform and power factor DC output stage according to the load variation. The proposed system can be applied as a rectification system for small and medium-sized environmentally friendly ships.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.3
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• pp.637-647
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• 2010

This paper suggested an algorithm that uses a multiplier, 'w bit $\times$ w bit = 2w bit', to process $\frac{N}{D}$ integer division of 2w bit integer N and w bit integer D. An algorithm suggested of the research, when the divisor D is '$D=0.d{\times}2^L$, 0.5 < 0.d < 1.0', approximate value of $\frac{1}{D}$, '$1.g{\times}2^{-L}$', which satisfies '$0.d{\times}1.g=1+e$, e < $2^{-w}$', is defined as over reciprocal number and the dividend N is segmented in small word more than 'w-3' bit, and partial quotient is calculated by multiplying over reciprocal number in each segmented word, and quotient of double precision integer division is evaluated with sum of partial quotient. The algorithm suggested in this paper doesn't require additional correction, because it can calculate correct reciprocal number. In addition, this algorithm uses only multiplier, so additional hardware for division is not required to implement microprocessor. Also, it shows faster speed than the conventional SRT algorithm. In conclusion, results from this study could be used widely for implementation SOC(System on Chip) and etc. which has been restricted to microprocessor and size of the hardware.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.7
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• pp.1296-1302
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• 2016

A hardware implementation of ultra-lightweight block cipher algorithm PRESENT that was specified as a block cipher standard for lightweight cryptography ISO/IEC 29192-2 is described in this paper. Two types of crypto-core that support master key size of 80-bit are designed, one is for encryption-only function, and the other is for encryption and decryption functions. The designed PR80 crypto-cores implement the basic cipher mode of operation ECB (electronic code book), and it can process consecutive blocks of plaintext/ciphertext without reloading master key. The PR80 crypto-cores were designed in soft IP with Verilog HDL, and they were verified using Virtex5 FPGA device. The synthesis results using $0.18{\mu}m$ CMOS cell library show that the encryption-only core has 2,990 GE and the encryption/decryption core has 3,687 GE, so they are very suitable for IoT security applications requiring small gate count. The estimated maximum clock frequency is 500 MHz for the encryption-only core and 444 MHz for the encryption/decryption core.

• Progress in Medical Physics
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• v.17 no.3
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• pp.144-152
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• 2006

The telemedicine using independent client-server system via networks can provide high quality normalized services to many hospitals, specifically to local/rural area hospitals. This will eventually lead to a decreased medical cost because the centralized institute can handle big computer hardware systems and complicated software systems efficiently and economically, Customized cancer radiation treatment planning for each patient Is very useful for both a patient and a doctor because it makes possible for the most effective treatment with the least possible dose to patient. Radiation planners know that too small a dose to the tumor can result in recurrence of the cancer, while too large a dose to healthy tissue can cause complications or even death. The best solution is to build an accurate planning simulation system to provide better treatment strategies based on each patient's computerized tomography (CT) image. We are developing a web-based and a network-based customized cancer radiation therapy simulation system consisting of four Important computer codes; a CT managing code for preparing the patients target data from their CT image files, a parallel Monte Carlo high-energy beam code (PMCEPT code) for calculating doses against the target generated from the patient CT image, a parallel linear programming code for optimizing the treatment plan, and scientific data visualization code for efficient pre/post evaluation of the results. The whole softwares will run on a high performance Beowulf PC cluster of about 100-200 CPUs. Efficient management of the hardware and software systems is not an easy task for a hospital. Therefore, we integrated our system into the client-sewer system via network or web and provide high quality normalized services to many hospitals. Seamless communication with doctors is maintained via messenger function of the server-client system.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.5
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• pp.35-44
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• 2018

The purpose of this study was to derive the factors that affect the development cost and the priority/weight of effectiveness in the pre-development stage of a service robot to estimate the development cost. In particular, the functions of service robots vary according to the field of application, and their prices are not only different but most of them are small-scale production; hence, a cost estimation is necessary. In this research, the factors affecting the service robot development cost in the process of service robot development and adding functions are classified as a functional factor while the factors that affect the entire development cost due to environmental causes, in which the service robot is operated or in the development process, are classified as an adjustment factor. The FGI was conducted to derive the factors and a Delphi survey was conducted among 84 domestic experts to determine the weights of the factors. As a result of the analysis, six functional factors (41 detailed criteria) and five adjustment factors (17 criteria) were derived, the cost weight and rank of the factors were suggested. This study suggests that the development cost of the service robot can be used as a decision-making strategy to select the operation functions in the development process, and can be utilized as an essential tool for the service robot development.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.47 no.5
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• pp.33-42
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• 2010

In this study, we have proposed a simple cardiorespiratory monitoring method based on displacements of human body which occurs due to periodic heartbeat and breathing. The proposed system consists of an aircushion, pressure sensing hardware and heartbeat and respiration signals extraction algorithm. The aircushion was used for unconstrained measurement of the respiration and heartbeats without a sensor attached on the subject's skin surface. The displacements of subject sitting on the aircushion cause small pressure variations. These variations are amplified and filtered with the pressure sensing hardware. Finally, heart rate and respiration rate are extracted by signal processing algorithm based on frequency domain filter. To evaluate the performance, extracted respiration and heart rate from proposed system were compared with conventional methods. The average sensitivity of respiration and heart rate are 98.67% and 99.24%, respectively. These results show the proposed method has advantages of installing and processing simplicity so as to be used easily in unconstrained respiration and heart rate monitoring in daily life.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.1
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• pp.20-27
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• 2010

This paper describes a design of 5-stage pipelined de-blocking filter with power reduction scheme and proposes a efficient memory architecture and filter order for high performance H.264/AVC Decoder. Generally the de-blocking filter removes block boundary artifacts and enhances image quality. Nevertheless filter has a few disadvantage that it requires a number of memory access and iterated operations because of filter operation for 4 time to one edge. So this paper proposes a optimized filter ordering and efficient hardware architecture for the reduction of memory access and total filter cycles. In proposed filter parallel processing is available because of structured 5-stage pipeline consisted of memory read, threshold decider, pre-calculation, filter operation and write back. Also it can reduce power consumption because it uses a clock gating scheme which disable unnecessary clock switching. Besides total number of filtering cycle is decreased by new filter order. The proposed filter is designed with Verilog-HDL and functionally verified with the whole H.264/AVC decoder using the Modelsim 6.2g simulator. Input vectors are QCIF images generated by JM9.4 standard encoder software. As a result of experiment, it shows that the filter can make about 20% total filter cycles reduction and it requires small transposition buffer size.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.5
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• pp.269-274
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• 2013

To proportionally control the electronic valve position of the actuator, we designed and fabricated PCU, CPT, and rotary absolute optical encoder for the detection of absolute angular position in the actuator. We also designed and constructed the test system by using DAQ hardware and Labview. We designed PCU to convert 1-5 V, 0-5 V, 0-10 V, 2-10 V voltage signals and 4-20 mA current signals to the voltage signals in the common 0.5-2.5 V range. We designed CPT to output 4-20 mA current signals corresponding to the valve positions based on the PWM signal input from the MCU. We also designed 20 bit optical encoder by using infrared LED and infrared transistor and made the serial communication with the main board possible. When we tested PCU and CPT with DAQ hardware and Labview software, they operated correctly with the small errors within ${\pm}0.003$ V and ${\pm}0.01$ mA, respectively, showing that our actuator has the excellent performance to employ as the industrial proportional-valve-actuator. The resolution of the encoder was $11.25^{\circ}$ and the maximum revolution to detect was 32,768.

• Journal of the Korea Society for Simulation
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• v.15 no.1
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• pp.35-42
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• 2006

Sensor network, that is an infrastructure of ubiquitous computing, consists of a number of sensor nodes of which hardware is very small. The network topology and routing scheme of the network should be determined according to its purpose, and its hardware and software may have to be changed as needed from time to time. Thus, the sensor network simulator being capable of verifying its behavior and estimating performance is required for better design. Sensor network simulators currently existing have been developed for specific hardwares or operating systems, so that they can only be used for such systems and do not provide any means to estimate the amount of power consumption and program execution time which are major issues for system design. In this study, we develop the sensor network simulator that can be used to design and verify various sensor networks without regarding to types of applications or operating systems, and also has the capability of predicting the amount of power consumption and program execution time. For this purpose, the simulator is developed by using machine instruction-level discrete-event simulation scheme. As a result, the simulator can be used to analyze program execution timings and related system behaviors in the actual sensor nodes in detail. Instruction traces used as workload for simulations are executable images produced by the cross-compiler for ATmega128L microcontroller.