• 한국멀티미디어학회논문지
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• 제9권12호
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• pp.1700-1708
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• 2006

Since the most program execution time is consumed in a loop structure, extracting parallelism from loop programs is critical for the taster program execution. In this paper, we proposed data dependency removal method for a single loop. The data dependency removal method can be applied to uniform and non-uniform data dependency distance in the single loop. Procedure calls parallelisms with only a single loop structure or procedure call most of other methods are concerned with the uniform code within the uniform data dependency distance. We also propose an algorithm, which can be applied to uniform, non-uniform, and complex data dependency distance among the multiple procedures. We compared our method with conventional methods using CRAY-T3E for the performance evaluation. The results show that the proposed algorithm is effective.

• 한국정보전자통신기술학회논문지
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• 제14권6호
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• pp.479-486
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• 2021

본 논문에서는 신호감지회로(Signal Sensing Circuit : SSC)를 추가하여 2개의 루프로 구성된 단일 커패시터 루프필터를 가진 극소형 위상고정루프(Phase Locked Loop : PLL)를 제안하였다. 위상고정루프 크기를 극단적으로 줄이기 위하여 가장 많은 면적을 차지하는 수동소자 루프필터를 극소형 단일 커패시터(2pF)로 설계하였다. 신호감지회로가 포함된 내부 부궤환 루프 출력이 외부 부궤환 루프의 단일 커패시터 루프필터 출력에 부궤환 역할을 하여 제안한 극소형 위상고정루프가 안정적으로 동작하도록 설계하였다. 위상고정루프 출력 신호 변화를 감지하는 신호 감지 회로는 루프필터의 커패시턴스 전하량을 조절하여 위상고정루프 출력 주파수의 초과 위상변이를 줄였다. 제안된 구조는 기존 구조에 비해 1/78 정도의 작은 커패시터를 가짐에도 불구하고 지터 크기는 10% 정도 차이가 난다. 본 논문의 위상고정루프는 1.8V 180nm 공정을 사용하였고, Spice를 통해 안정하게 동작하는 시뮬레이션 결과를 보여주었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
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• pp.57-60
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• 2004

This paper presents multibit Sigma-Delta ADC using Leslie-Singh Structure to Improve nonlinearity of feedback loop. 4-bit flash ADC for multibit Quantization in Sigma Delta modulator offers the following advantages such as lower quantization noise, more accurate white-noise level and more stability over single quantization. For the feedback paths consisting of DAC, the DAC element should have a high matching requirement in order to maintain the linearity performance which can be obtained by the modulator with a multibit quantizer. Thus a Sigma-Delta ADC usually adds the dynamic element matching digital circuit within feedback loop. It occurs complexity of Sigma-Delta Circuit and increase of power dissipation. In this paper using the Leslie-Singh Structure for improving nonliearity of ADC. This structure operate at low oversampling ratio but is difficult to achieve high resolution. So in this paper propose improving loop filter for single-bit feedback multi-bit quantization Sigma-Delta ADC. It obtained 94.3dB signal to noise ratio over 615kHz bandwidth, and 62mW power dissipation at a sampling frequency of 19.6MHz. This Sigma Delta ADC is fabricated in 0.25um CMOS technology with 2.5V supply voltage.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1997년도 한국자동제어학술회의논문집; 한국전력공사 서울연수원; 17-18 Oct. 1997
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• pp.1334-1337
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• 1997

A spacecraft attitude control ground hardware simulator development is discussed in the paper. The simulator is called KT/KARI HILSSAT(Hardware-In-the Loop Simulator Single Axis Testbed), and the main structure consists of a single axis bearing and a satellite main body model on the bearing. The single axis tabel as ans experimental hardware simulator that evaluates performance and applicability of a satellite before evolving and/or confirming a mew or and old control logic used in the KOREASAT is developed. Attitude control of spaceraft by using reaction wheel is performed.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
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• pp.334-338
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• 2004

In this paper, we suggest a new antenna structure for RFID(Radio Frequency IDentification) reader. Conventional RFID reader uses a loop antenna. The central area of a loop antenna shows a low magnetic field strength especially for the case of a large loop antenna diameter. We propose a parallel-fed multiple loop antenna. Simulation results and measured results show that we can adjust field distribution with the number of turns and diameter of an inner loop antenna to obtain a longer reading distance. Simulation results for the specific case of a proposed antenna structure show that at the center point of a proposed parallel-fed multiple loop antenna, the typical card area averaged magnetic field strength is 2.53A/m, which is higher than the case of a conventional type single loop antenna of 0.44A/m and the case of a series-fed multiple loop antenna of 0.96A/m when we drive with same source signal. We realized the antenna for the case of 13.56MHz RFID reader and the performance of reading distance was much more improved than the case of a conventional antenna.

• Journal of Microbiology
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• 제41권3호
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• pp.239-247
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• 2003

The LRV1-4 capsid protein possesses an endoribonuclease activity that is responsible for the single site-specific cleavage in the 5' untranslated region (UTR) of its own viral RNA genome and the formation of a conserved stem-loop structure (stem-loop IV) in the UTR is essential for the accurate RNA cleavage by the capsid protein. To delineate the nucleotide sequences, which are essential for the correct formation of the stem-loop structure for the accurate RNA cleavage by the viral capsid protein, a wildtype minimal RNA transcript (RNA 5' 249-342) and several synthetic RNA transcripts encoding point-mutations in the stem-loop region were generated in an in vitro transcription system, and used as substrates for the RNA cleavage assay and RNase mapping studies. When the RNA 5' 249-342 transcript was subjected to RNase T1 and A mapping studies, the results showed that the predicted RNA secondary structure in the stem-loop region using FOLD analysis only existed in the presence of Mg$\^$2＋/ ions, suggesting that the metal ion stabilizes the stem-loop structure of the substrate RNA in solution. When point-mutated RNA substrates were used in the RNA cleavage assay and RNase T1 mapping study, the specific nucleotide sequences in the stem-loop region were not required for the accurate RNA cleavage by the viral capsid protein, but the formation of a stem-loop like structure in a region (nucleotides from 267 to 287) stabilized by Mg$\^$2＋/ ions was critical for the accurate RNA cleavage. The RNase T1 mapping and EMSA studies revealed that the Ca$\^$2＋/ and Mn$\^$2＋/ ions, among the reagents tested, could change the mobility of the substrate RNA 5' 249-342 on a gel similarly to that of Mg$\^$2＋/ ions, but only Ca$\^$2＋/ ions identically showed the stabilizing effect of Mg$\^$2＋/ ions on the stem-loop structure, suggesting that binding of the metal ions (Mg$\^$2＋/ or Ca$\^$2＋/) onto the RNA substrate in solution causes change and stabilization of the RNA stem-loop structure, and only the substrate RNA with a rigid stem-loop structure in the essential region can be accurately cleaved by the LRV1-4 viral capsid protein.

• 한국전자통신학회논문지
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• 제9권8호
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• pp.921-926
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• 2014

본 논문에서는 CSLR(Complementary Single Loop Resonator)을 이용한 인셋 급전 마이크로스트립 안테나의 특성에 대해 연구하였다. SLR(Single Loop Resonator) 단일 구조에서 시뮬레이션 셋업 과정을 통해 산란계수로부터 실효투자율을 계산하였으며, 실효투자율이 음의 값을 갖는 주파수에서 SLR 구조의 치수를 선택하였다. 그리고 인셋 급전된 마이크로스트립 안테나의 접지면에 SLR 구조의 쌍대 구조인 CSLR을 $3{\times}3$으로 배열하여 최적 안테나를 설계하였다. 설계한 안테나의 반사손실과 복사패턴을 구하였으며, 공진주파수 2.82 GHz에서 기존의 인셋 급전 안테나와 크기를 비교하면 면적 대비 약 56.8%가 감소하는 결과를 얻었다. 사용된 툴은 3차원 FEM 툴인 Ansoft사의 HFSS를 사용하였다.

• Journal of Power Electronics
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• 제14권6호
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• pp.1334-1344
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• 2014

A novel single phase Phase-Locked Loop (PLL) is proposed in this paper to accurately and rapidly estimate the instantaneous phase angle of a grid. A conjugate rotating vector pair is proposed and defined to synthesize the single phase signal in the stationary reference frame. With this concept, the proposed PLL innovatively sets one phase input of the PARK transformation to a constant zero. By means of a proper cancellation, a zero steady state phase angle estimation error can be achieved, even under magnitude and frequency variations. The proposed PLL structure is presented together with guidelines for parameters adjustment. The performance of the proposed PLL is verified by comprehensive experiments. Satisfactory phase angle estimation can be achieved within one input signal cycle, and the estimation error can be totally eliminated in four input cycles for the most severe conditions.

• Journal of Power Electronics
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• 제9권1호
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• pp.124-131
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• 2009

This paper presents a PWM dc-ac converter regulation using a Single Input Fuzzy PI Controller (SIFPIC). The SIFPIC is derived from the signed distanced method, which is a simplification of a conventional fuzzy controller. The simplification results in a one-dimensional rule table, that allows its control surface to be approximated by a piecewise linear relationship. The controller multi-loop structure is comprised of an outer voltage and an inner current feedback loop. To verify the performance of the SIFPIC, a low power PWM dc-ac converter prototype is constructed and the proposed control algorithm is implemented. The experimental results show that the SIFPIC performance is comparable to a conventional Fuzzy PI controller, but with a much reduced computation time.

• 한국정보통신학회논문지
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• 제21권2호
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• pp.339-344
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• 2017

본 논문에서는 Early-late detector, Duty-rate modulator, 그리고 LSI(Lock Status Indicator)를 사용하여 작은 크기와 빠른 위상고정 시간을 갖는 위상고정루프를 제안하였다. 제안된 위상고정루프는 작은 용량을 가진 하나의 커패시터를 사용하게 됨으로써 칩의 크기를 결정하는 루프필터의 크기가 작아지게 되어 크기를 최소화 하였다. 기존의 전하펌프와 달리 2개의 전하펌프를 사용하여 하나의 커패시터를 사용하더라도 2차 루프필터를 사용 한 것과 같은 전압파형을 만들어 줌으로써 위상을 고정시킬 수 있다. 2개의 전하펌프는 UP, DN신호 위상의 빠르기를 감지해주는 Early-late detector와 일정한 비율의 파형을 만들어주는 Duty-rate modulator에 의해 제어된다. LSI회로를 사용함으로써 빠른 위상고정시간을 얻을 수 있다. 제안된 위상고정루프는 1.8V $0.18{\mu}m$ CMOS 공정을 사용하여 설계하였고, Hspice 시뮬레이션을 통해 회로의 동작을 검증하였다.