• Journal of the Korean Institute of Intelligent Systems
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• v.18 no.5
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• pp.611-616
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• 2008

Error correcting codes (ECCs) are commonly used to protect against the soft errors. Single error correcting and double error detecting (SEC-DED) codes are generally used for this purpose. The proposed approach in this paper selectively reduced power consumption, delay, and area in single-error correcting, double error-detecting checker circuits that perform memory error correction. The multi-objective genetic algorithm is employed to solve the non -linear optimization problem. The proposed method allows that user can choose one of different non-dominated solutions depending on which consideration is important among them. Because we use multi-objective genetic algorithm, we can find various dominated solutions. Therefore, we can choose the ECC according to the important factor of the power, delay and area. The method is applied to odd-column weight Hsiao code which is well- known ECC code and experiments were performed to show the performance of the proposed method.

• Electronics and Telecommunications Trends
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• v.38 no.5
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• pp.34-50
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• 2023

Quantum error correction is a key technology for achieving fault-tolerant quantum computation. Finding the best decoding solution to a single error syndrome pattern counteracting multiple errors is an NP-hard problem. Consequently, error decoding is one of the most expensive processes to protect the information in a logical qubit. Recent research on quantum error decoding has been focused on developing conventional and neural-network-based decoding algorithms to satisfy accuracy, speed, and scalability requirements. Although conventional decoding methods have notably improved accuracy in short codes, they face many challenges regarding speed and scalability in long codes. To overcome such problems, machine learning has been extensively applied to neural-network-based error decoding with meaningful results. Nevertheless, when using neural-network-based decoders alone, the learning cost grows exponentially with the code size. To prevent this problem, hierarchical error decoding has been devised by combining conventional and neural-network-based decoders. In addition, research on quantum error decoding is aimed at reducing the spacetime decoding cost and solving the backlog problem caused by decoding delays when using hardware-implemented decoders in cryogenic environments. We review the latest research trends in decoders for quantum error correction with high accuracy, neural-network-based quantum error decoders with high speed and scalability, and hardware-based quantum error decoders implemented in real qubit operating environments.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.11C
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• pp.1030-1036
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• 2006

In this paper, we present two methods of correcting bit errors in constant amplitude multi-code (CAMC) CDMA, which uses the redundant bits only. The first method is a parity-based bit correction with hard-decision, where the received signals despread into n two-dimensional structure with both horizontal parity and vertical parity. Then, an erroneous bit is corrected for each $4{\times}4$ pattern. The second method is a turbo decoding, which is modified from the decoding of a single parity check product code (SPCPC). Experimental results show that, in the second method, the redundant bits in CAMC can be fully used for the error correction and so they are not really a loss of channel bandwidth. Hence, CAMC provides both a low peak-to-average power ratio and robustness to bit errors.

• Journal of Positioning, Navigation, and Timing
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• v.11 no.4
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• pp.317-325
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• 2022

In this paper, we developed a single frequency-based RRAIM to monitor integrity of the UAM landing vertically in urban area with only low-cost single-frequency GPS receiver. Conventional dual-frequency RRAIM eliminates ionospheric delay through a combination of frequencies. In this study, ionospheric delay was directly modeled. Drift error of residual ionospheric delay is modeled using the previously studied result on ionospheric rates of change. To verify the performance of the proposed RRAIM algorithm, a simulation of vertical landing UAM in urban area was conducted. It was assumed that the protection level at the initial position was calculated through SBAS correction data. During vertical landing, integrity monitored by receiver alone without external correction data. In the 60 sec simulation, the protection level of the proposed RRAIM compared to the conventional RRAIM was calculated to be 140% due to the accumulated ionospheric delay error. Nevertheless, it was confirmed that the final vertical protection level meeting the requirements of LPV-200, which cannot be achieved with single frequency GPS receiver alone.

• Journal of IKEEE
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• v.22 no.4
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• pp.1168-1174
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• 2018

For the initial state of NAND flash memories, error-free and single-error cases are dominant due to a good channel environment on memory cells. It is important to deal with such cases, which affects the overall system performance. However, the conventional schemes for polar codes equally decode the codes even for the error-free and single-error cases since they cannot classify and decode separately. In this paper, a new pre-processing scheme for polar codes is proposed so as to improve the overall decoding latency by decoding the frequent error-free and single-error cases. Before the ordinary decoding process, the proposed scheme first decodes the frequent error-free and single-error cases. According to the experimental results, the proposed pre-processing scheme decreases the average decoding latency by 64% compared to the conventional scheme for (1024, 512) polar codes.

• IEMEK Journal of Embedded Systems and Applications
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• v.9 no.5
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• pp.285-292
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• 2014

The commonly used Newton-Raphson's floating-point number divider algorithm performs two multiplications in one iteration. In this paper, a tentative K'th Newton-Raphson's floating-point number divider algorithm which performs K times multiplications in one iteration is proposed. Since the number of multiplications performed by the proposed algorithm is dependent on the input values, the average number of multiplications per an operation in single precision and double precision divider is derived from many reciprocal tables with varying sizes. In addition, an error correction algorithm, which consists of one multiplication and a decision, to get exact result in divider is proposed. Since the proposed algorithm only performs the multiplications until the error gets smaller than a given value, it can be used to improve the performance of a floating point number divider unit. Also, it can be used to construct optimized approximate reciprocal tables.

• Journal of Institute of Control, Robotics and Systems
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• v.6 no.2
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• pp.228-233
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• 2000

It is common to apply the technology of FPGA (Fie이 Programmable Gate Array) which is one of the design methods for ASIC(Application Specific IC)to the active components used in the data processing at the digital system of satellite aircraft missile etc for compact lightness and integration of Printed Circuit Board (PCB) In carrying out the digital data processing the FPGAs are designed for the various functions of the Process Control Interrupt Control Clock Generation Error Detection and Correction (EDAC) as the individual module. In this paper an FPGA chip for Single Error Correction and Double Error Detection (SEC-DED) for EDAC is designed and simulated by using a VLSI design software LODECAP.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.5
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• pp.1036-1042
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• 2011

This paper presents an algorithm that conducts automatic memory scrubbing operated by dedicated hardwares. The proposed algorithm is designed so that it can scrub entire memory in a given scrub period, while minimally affecting the execution of flight softwares. The scrub controller is constructed in a form of state machines, which have two execution modes - normal mode and burst mode. The deadline event generator and period tick generator are designed in a separate way to support the behavior of the scrub controller. The proposed controller is implemented in VHDL code to validate its applicability. A simple version of the controller is also applied to mass memory modules used in STSAT-3.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.7
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• pp.1477-1486
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• 1997

Conventioally the decoding methods and the design of coset codes for burst synchronization and error detection have been based on the concept that slips occuring to the right or to the left with respect to a reference timing are corrected. In this paper we newly approach to the design of coset codes relying on the condition that only a single code word can exists in an observation interval, which provides an extentended view on the conventional approach. A theorem concerning the condition is presented. A combined burst synchronization and error detection system with maximum slip correction capability have been devised based on the theorem and a detection method is falsely accepted in the presented of channel errors. The false acceptance probabilities of the system are derived and its performance is analyzed through computer computation using the derived results.

• Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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• v.25 no.5
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• pp.399-405
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• 2007

Providing a precise positioning information is the primary characteristics of GPS. The relative positioning technique which utilizes the common measurements between a GPS reference station and a user is generally used to do the generation of a precise positioning. But if user is far from a GPS reference site, the properties of medium penetrated by GPS signals will be different from each other, It is difficult to eliminate the error sources such as the ionosphere and the troposphere effectively by the double differencing method. In this study the additional error correction values with the ionosphere and the troposphere to the data processing have applied. As a result, the positioning accuracy of fourteen out of seventeen testing sites were improved by appling the error correction values. We also analysed the improved rate of the positioning accuracy by the baseline.