• Proceedings of the KIEE Conference
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• 2002.11d
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• pp.24-26
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• 2002

The recent emphasis on energy conservation demands an improvement of the efficiency of single-phase induction motors. To take the efficiency operation of the capacitor run single-phase induction motor with auxiliary and main winding, it is very important to select the capacitance value. This paper describes the theoretical analysis method of a single-phase induction motor which is based on the rotating field theory, using the method of symmetrical components. The optimal selection method of capacitance is proposed.

• KIEE International Transactions on Power Engineering
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• v.3A no.1
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• pp.17-26
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• 2003

In this paper, the comparative steady-state operating performance analysis algorithms of the stand-alone single-phase self-excited induction generator (SEIG) is presented on the basis of the two nodal admittance approaches using the per-unit frequency in addition to a new state variable de-fined by the per-unit slip frequency. The main significant features of the proposed operating circuit analysis with the per-unit slip frequency as a state variable are that the fast effective solution could be achieved with the simple mathematical computation effort. The operating performance results in the simulation of the single-phase SEIG evaluated by using the per-unit slip frequency state variable are compared with those obtained by using the per-unit frequency state variable. The comparative operating performance results provide the close agreements between two steady-state analysis performance algorithms based on the electro-mechanical equivalent circuit of the single-phase SEIG. In addition to these, the single-phase static VAR compensator; SVC composed of the thyristor controlled reactor; TCR in parallel with the fixed excitation capacitor; FC and the thyristor switched capacitor; TSC is ap-plied to regulate the generated terminal voltage of the single-phase SEIG loaded by a variable inductive passive load. The fixed gain PI controller is employed to adjust the equivalent variable excitation capacitor capacitance of the single-phase SVC.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.2
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• pp.339-344
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• 2017

A novel structure of phase locked loop (PLL) which has small size and fast locking time with Early-late detector, Duty-rate modulator, and Lock status indicator (LSI) is proposed in this paper. The area of loop filter usually occupying the larger portion of the chip is minimized using a single small capacitor. While the conventional PLL with a single capacitor loop filter cannot work stably, the proposed PLL with two charge pumps works stably because the output voltage waveform of the proposed a single capacitor loop filter is the same as the output voltage waveform of the conventional 2nd-order loop filter. The two charge pumps are controlled by the Early-late detector which detects early-late status of UP and DN signals, and Duty-rate modulator which generates a steady duty-rate signal. Fast locking time is achieved using LSI. It has been simulated and proved by HSPICE in a CMOS $0.18{\mu}m$ 1.8V process.

• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.365-366
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• 2016

This paper presents a single-phase transformerless photovoltaic (PV) power converter systems based on the AC/DC boost inverter, which is capable of solving the leakage current and second-order ripple power issues. By eliminating the inherent ripple power in single-phase inverter, the bulky electrolytic capacitor can be replaced by a small film capacitor. The validity of the proposed scheme has been verified by the simulation results.

• Proceedings of the IEEK Conference
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• 2002.06e
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• pp.307-310
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• 2002

A design for the input filter and the output filter of a single-phase UPS system is proposed. And also, this paper describes a reduction of the DC voltage ripple of a single-phase UPS. The input power of proposed UPS fluctuates with twice frequency of the utility source, which causes DC voltage fluctuation. The reduction of the DC voltage fluctuation requires a large DC link capacitor. The proposed method uses a LC series resonant filter paralleled with a conventional smoothing capacitor. The effectiveness of the proposed method was confirmed by simulation results.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.60 no.4
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• pp.220-226
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• 2011

This paper proposes a straightforward method of analyzing the operation characteristics for the capacitor run single-phase induction motor from the traditional equivalent circuit based on the revolving field theory. The proposed method consists of five procedures as follows: mechanical loss segregation, iron loss segregation and calculation of the equivalent circuit parameters, recalculation of parameters of the main winding side, calculation of the auxiliary winding magnetizing reactance and effective turn ratio, and analyzing the operation characteristics for this motor. When the characteristics are analyzed, the segregated mechanical and iron losses are considered as a loss resistance across input terminals of the equivalent circuit for the analysis. The validity of the proposed method is verified from the comparison between the computed results and the experimental ones for the operation characteristics.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1635-1645
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• 2015

This study proposes high-performance voltage controller design that employs a capacitor current control model for single-phase stand-alone inverters. The single-phase stand-alone inverter is analyzed via modeling, which is then used to design the controller. A design methodology is proposed to maximize the bandwidth of the feedback controller. Subsequently, to compensate for the problems caused by the bandwidth limitations of the controller, an error transfer function that includes the feedback controller is derived, and the stability of the repetitive control scheme is evaluated using the error transfer function. The digital repetitive controller is then implemented. The simulation and experimental results show that the performance of the proposed controller is high in a 1.5 kW single-phase stand-alone inverter prototype.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.5B no.1
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• pp.20-26
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• 2005

Various kinds of practical machines using the single phase induction motor (SPIM) are utilized to control both speed and torque. In particular, the capacitor-run type SPIM has the characteristic that allows the motor torque to be altered by auxiliary capacitance variation. In this study, we manifest an equivalent model having a more simplified configuration, and clarify the relationship between torque and capacitance. Also, we design an experimental controller that is able to perform speed control with ease by the phase angle control of the AC input voltage. Validity of this study is confirmed through the simulation and experimental results obtained.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.1
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• pp.76-83
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• 2007

This paper describes a low power ROM using single charge-sharing capacitor and hierarchical bit line (SCSC-ROM). The SCSC-ROM reduces the power consumption in bit lines. It lowers the swing voltage of bit lines to a very small voltage by using a charge-sharing technique with a single capacitor. It implements the capacitor with dummy bit lines to improve noise immunity and make easy to design. The hierarchical bit line further saves the power by reducing the capacitance in bit lines. The SCSC-ROM also reduces the power consumption in control unit and predecoder by using the hierarchical word line decoder. The simulation result shows that the SCSC-ROM with $4K{\times}32bits$consumes only 37% power of a conventional ROM. A SCSC-ROM chip is fabricated in a $0.25{\mu}m$ CMOS process. It consumes 8.2mW at 240MHz with 2.5V.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.6
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• pp.479-486
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• 2021

In this paper, an ultra small phase locked loop (PLL) with a single capacitor loop filter has been proposed by adding a signal sensing circuit (SSC). In order to extremely reduce the size of the PLL, the passive element loop filter, which occupies the largest area, is designed with a very small single capacitor (2pF). The proposed PLL is designed to operate stably by the output of the internal negative feedback loop including the SSC acting as a negative feedback to the output of the single capacitor loop filter of the external negative feedback loop. The SSC that detects the PLL output signal change reduces the excess phase shift of the PLL output frequency by adjusting the capacitance charge of the loop filter. Although the proposed structure has a capacitor that is 1/78 smaller than that of the existing structure, the jitter size differs by about 10%. The PLL is designed using a 1.8V 180nm CMOS process and the Spice simulation results show that it works stably.