• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.1
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• pp.49-58
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• 1999

This paper describes an integrated low pass filter fabricated by using $0.8{\mu}m$ single poly CMOS ASIC technology. The filter has been designed for a 5th-order elliptic switched capacitor filter with cutoff frequency of 5khz, 0.1dB passband ripple. The filter consists of MOS swiches poly capacitors and five CMOS op-amps. For the realization of the SC filter, continuous time transfer function H(s) is obtained from LC passive type, and transfered as discrete time transfer H(z) through bilinear-z transform. Another filter has been designed by capacitor scaling for reduced chip area, considering dynamic range of the op-amp. The test results of two fabricated filters are cutoff frequency of 4.96~4.98khz, 35~38dB gain attenuation and 0.72~0.81dB passband ripple with the ${\pm}2.5V$power supply clock of 50KHz.

• Proceedings of the KIEE Conference
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• 1997.07f
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• pp.1999-2001
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• 1997

The main two drawbacks of the Sin91e Stage PFC (SS-PFC) converters employing a DCM Boost PFC cell are relatively high voltage stress on the bulk capacitor and the input current harmonic distortion. The high voltage stress on bulk capacitor makes the SS-PFC converter impractical in a universal input application and the input current harmonic distortion lowers power factor. In this paper a selective variable frequency control that reduces the voltage stress on the bulk capacitor and the input current harmonic distortion is proposed. Computer simulation results of the proposed control method are presented.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.121-123
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• 1996

Capacitor-run motor has a capacitor id series with the auxiliary winding for normal running connections. After the shape of stator and rotor are determined, the motor is designed with variables such as winding distributions or capacitance except punching variables. In this paper, the winding distribution and the turn ratio was taken as design variables because the winding distribution affects the torque and efficiency. And capacitance was selected as an additional variable. Simulation results show the validity of proposed method.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.56 no.2
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• pp.83-89
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• 2007

The LC filter design procedure of the inverter output filter is described. The transfer function of the filter output voltage to the load current is described with the capacitor value and the system time constant considering the system controller. By using the closed form of the relation between the filter capacitor value and the system time constant, the capacitor value can be calculated with the given system time constant and vice versa. It is more practical for the implementation of power and control circuit of inverter. And as the effect of the load current to the voltage distortion can be calculated from the closed form, it is possible to analyze the system how much the voltage waveform is distorted in case of the nonlinear load. All the proposed design procedure is verified with the simulation and experimental results.

• Journal of Power Electronics
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• v.9 no.3
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• pp.335-342
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• 2009

The Z-source inverter (ZSI) provides unique features such as the ability to boost dc voltage with a single stage simple structure. Although the dc capacitor voltage can be boosted by a shoot-through state, the voltage stress across the switching devices is rapidly increased, so high switching device power is required at the ZSI. In this paper, algorithms for minimizing the voltage stress are suggested. The possible operating region for obtaining a desired ac output voltage according to both the shoot-through time and active state time is investigated. The reference capacitor voltages are derived for minimizing the voltage stress at any desired ac output voltage by considering the dc input voltage. The proposed methods are carried out through the simulation studies and experiments with 32-bit DSP.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2712-2714
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• 1999

The small signal model for input series-output parallel connected converter system employing charge control together with input capacitor voltage feedback loop is developed. From the model developed, the effect of input capacitor voltage feedback loop to the system stability and outer loop compensator design is analyzed. Theoretical results and simulation show that input capacitor voltage feedback loop has no critical effects on the system stability, so the system can be reduced to a equivalent single module for the stability analysis and outer loop compensator design.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.49-52
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• 2002

Super Capacitors are now commercially available. To design an energy storage system with these devices it has to be understood that the device cannot be described by a single fixed capacitance. Furthermore, an internal charge redistribution process makes it difficult to predict the terminal voltage accurately. As a result, the device should be operated as a charge storage device and not as a voltage source. This paper deals with Energy Storage System with Super Capacitor for PV System. Discussed in this paper we, explains the basic characteristics of Super Capacitor which is compared with the Second Batteries.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2003.11a
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• pp.624-629
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• 2003

In this paper, broadband shunt technique for increasing transmission loss is experimentally investigated. Piezoelectric shunt damping is studied using resonant shunt circuit and negative capacitor shunt circuit. A resonant shunt circuit is implemented by using a resistor and inductor. Negative Capacitor shunt damping is similar in nature to resonant shunt damping techniques, as a single piezoelectric material is used to dampen multi-mode. Performance of both methods is experimentally studied for noise reduction. This is based upon SAE J1400 test method and a transmission loss measurement system is provided for it. This paper will present the test setup fer transmission loss measurement and the tuning procedure of shunt circuits. Finally the results of sound transmission tests will be shown.

• The Transactions of the Korean Institute of Power Electronics
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• v.23 no.1
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• pp.59-65
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• 2018

A new single-stage flyback power converter with PFC for electrolytic capacitor-less LED driver is proposed in this study. This method minimizes the peak-to-average ratio of the LED driving pulsating current by adding the LED driving current near the LED current valley area, as well as the third harmonic component injection into the input current. The reduced peak current value of the LED drive current minimizes the thermal stress of the LED itself, thereby increasing the reliability of the LED, as well as achieving a long lifetime. Simulation and experimental results show the usefulness of the proposed topology.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.63 no.4
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• pp.345-350
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• 2014

DC electrolytic capacitor is widely used in the power converter including PWM inverter, switching power supply and PFC Boost converter system because of its large capacitance, small size and low cost. In this paper, basic characteristics of DC electrolytic capacitor vs. frequency is presented and the real-time estimation scheme of ESR and capacitance based on the bandpass filtering is adopted to the single phase boost converter of uninterruptible power supply to diagnose its split dc-link capacitors. The feasibility of this real-time failure prediction monitoring system is verified by the computer simulation of the 5[kW] singe phase PFC half-bridge boost converter.