• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2001년도 ICCAS
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• pp.82.3-82
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• 2001

This work presents a design technique for the implementation of the liquid level control system by based on the use of a single-chip microcontroller. The proposed model system offers the following attractive features : (1) application of the pressure transducer for sensing the height of liquid in tank (2) using the obtained liquid level for defining on-off condition of the water pump (3) the liquid values were controlled by using stepping motors for controlling of 57 points (4) can set up by using manual control or automatic control (5) can monitor and display the process status either on microcontroller-based control board or on the computer via RS232 serial-port. Experimental results have been employed to show the effectiveness ...

• 한국농업기계학회:학술대회논문집
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• 한국농업기계학회 1996년도 International Conference on Agricultural Machinery Engineering Proceedings
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• pp.834-841
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• 1996

Egg production in Korea is becoming automated with a large scale farm. Although many operations in egg production have been and cracks are regraded as a critical problem. A computer vision system was built to generate images of a single , stationary egg. This system includes a CCD camera, a frame grabber board, a personal computer (IBM PC AT 486) and an incandescent back lighting system. Image processing algorithms were developed to inspect egg shell and to sort eggs. Those values of both gray level and area of dark spots in the egg image were used as criteria to detect holes in egg and those values of both area and roundness of dark spots in the egg and those values of both area and roundness of dark spots in the egg image were used to detect cracks in egg. Fro a sample of 300 eggs. this system was able to correctly analyze an egg for the presence of a defect 97.5% of the time. The weights of eggs were found to be linear to both the projected area and the perimeter of eggs v ewed from above. Those two values were used as criteria to sort eggs. Accuracy in grading was found to be 96.7% as compared with results from weight by electronic scale.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 1993년도 Fifth International Fuzzy Systems Association World Congress 93
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• pp.975-976
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• 1993

This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}

• Journal of Positioning, Navigation, and Timing
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• 제6권4호
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• pp.195-203
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• 2017

A 2U cube satellite called SNUGLITE has been developed by GNSS Research Laboratory in Seoul National University. Its main mission is to perform actual operation by mounting dual-frequency global positioning system (GPS) receivers. Its scientific mission aims to observe space environments and collect data. It is essential for a cube satellite to control an Earth-oriented attitude for reliable and successful data transmission and reception. To this end, an attitude estimation and control algorithm, Attitude Determination and Control System (ADCS), has been implemented in the on-board computer (OBC) processor in real time. In this paper, the Extended Kalman Filter (EKF) was employed as the attitude estimation algorithm. For the attitude control technique, the Linear Quadratic Gaussian (LQG) was utilized. The algorithm was verified through the processor in the loop simulation (PILS) procedure. To validate the ADCS algorithm in the ground, the experimental verification via a single axis Hardware-in-the-loop simulation (HILS) was used due to the simplicity and cost effectiveness, rather than using the 3-axis HILS verification (Schwartz et al. 2003) with complex air-bearing mechanism design and high cost.

• 한국음향학회지
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• 제36권1호
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• pp.57-63
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• 2017

본 논문에서는 FxLMS(Filtered-x Least Mean Square) 알고리즘을 이용한 단일 센서 기반의 능동 반향음 제어 알고리즘을 제안한다. 제안 알고리즘은 먼저 단일 센서 입력 신호로부터 입사음과 반향음을 분리하고, 분리된 신호들을 사용하여 반향음과 반대 위상을 갖는 제어 신호를 생성한다. 제어 신호는 센서 위치에서 반향음과 중첩되어 반향음의 음압을 감소시킨다. 적절한 신호 분리를 위해 반향 음향 경로와 제어 음향 경로가 필요하며 이는 swept sine 신호를 이용해 측정한 음향 응답으로부터 사전에 구할 수 있다. 효용성을 검증하기 위해 DSP(Digital Signal Processing) 보드를 사용하여 제안된 알고리즘을 실시간으로 구현하였으며, 공기 중 음향 덕트 환경에서 1 kHz 버스트 신호에 대해 반향음이 11.6 dB 감소함을 확인 하였다.

• 한국정보과학회논문지:컴퓨팅의 실제 및 레터
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• 제16권11호
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• pp.1131-1135
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• 2010

본 논문에서는 고정시킨 평면거울을 바라보는 단일 카메라에서 얻어진 영상을 이용하여 훈련자 양 하지의 자세를 3차원으로 추정하는 방법을 제안한다. 이를 위해, 카메라 입력영상으로부터 평면거울에 부착된 네 개의 적외선 마커를 탐색하여 단일 카메라의 자세를 추정한다. 추정된 카메라 자세를 통해 거울평면을 기준으로 하는 훈련공간을 정의하고, 압력 센서를 사용하여 공간 내의 훈련자의 양 하지 위치를 측정한다. 양 하지의 마커는 직접적으로, 또는 거울을 통해 카메라 영상으로 투영되고, 정의된 훈련 공간에서 3차원 위치로 변환된다. 변환된 마커들의 3차원 위치관계에 의해 최종적으로 양 하지의 자세를 얻고 연속적인 움직임에 대해 운동 상태를 추정한다.

• Journal of Biosystems Engineering
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• 제7권2호
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• pp.18-29
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• 1983

효율적(效率的)인 농업기계(農業機械)의 실내(室內) 및 실외실험(室外實驗)을 위(爲)하여 Microcomputer에 의(依)한 Data 측정(測定)을 위(爲)해 A/D 변환기(變煥器)를 Interface 시키고, 이를 기록보관(記錄保管)하기 위해 Computer memory인 2716용(用) EPROM programmer와 Microprinter를 interface시켰고, 실험(實驗) 후(後)Data를 다시 HP computer로 전송(傳送)하기 위(爲)한 RS232C 장치(裝置) 등(等)의 Hardware를 구성(構成)하고, 이들의 작동(作動)을 위(爲)한 Microprogram을 개발(開發)하여 Data acquisition system으로 활용(活用)할 수 있는 방안(方案)을 연구(硏究)한 본(本) 연구(硏究)의 주요(主要) 결과(結果)를 요약(要約)하면 다음과 같다. 1. 사용(使用) channel수(數), 측정시간(測定時間) 간격(間隔) 및 측정(測定) data수(數)를 자유(自由)로 조정할 수 있는 측정용(測定用) microprogram을 개발(開發)하였으며 최소(最小) 측정시간(測定時間) 간격(間隔)은 $58.8{\mu}s$이었다. 2. A/D 변환기(變煥器)의 Calibration을 위(爲)해 Function generator에서 삼각파(三角波), 구형파(矩形波), sin파등(波等)을 발생(發生)시켜 Oscillograph에서 확인(確認)하고 이를 계측(計測)하여 보관(保管)한 후(後) HP Computer에 전송(傳送)하여 plotting한 결과(結果) 정확(正確)한 파형(波形)을 얻을 수 있었다. 3. Data 기록(紀錄)을 위(爲)한 EPROM programmer는 잘 동작(動作)하였으며 기록(紀錄) 및 원래(原來)의 Data와 비교(比較)하는 데 총 소요시간(所要時間)은 75초 정도였고, 취급이 용이(容易)할 뿐 아니라 지워서 재사용(再使用)할 수 있어 경제적(經濟的)이었다. 4. Data의 기록(記錄)을 위(爲)한 Microprinter는 그 2kB Decimal로 변환(變換)시켜 Print하는 시간(時間)이 15분(分) 정도이었으며 계측(計測)과 동시(同時)에 기록(記錄)시키는 완속측정용(緩速測定用)으로 적당하였다. 5. 본(本) system과 HP3000 컴퓨터 간(間)의 Data 전송(傳送) 장치(裝置)를 사용(使用)하면 2k byte의 Data를 HP3000 computer로 전송(傳送)하는데 1~2분(分)정도 소요(所要)되었고, 작동(作動)은 만족스러웠다. 6. 사용(使用) 전원(電源)은 DC/DC 변환기(變煥器)를 사용(使用)하여 입력전원(入力電源)이 7~25V로 단일화(單一化)하였으며, 그 상용전류(常用電流)는 1.8A정도로 tractor의 battery를 사용(使用)할 경우도 시동시(始動時)에 전압강하(電壓降下)에 의(依)한 컴퓨터의 오동작(誤動作)이 일어나지 않았으며 야외실험(野外實驗)에서의 적응성(適應性)이 우수하였다. 이상(以上)의 결과(結果)를 종합할 때 본(本) system은 실내(室內) 및 실외(室外) 실험(實驗)을 위(爲)한 Data auquistition system으로 활용(活用)할 수 있으며 경제적면(經濟的面)이나 정말 고속 측정(側定) 면(面)에서 우수한 성능(性能)을 갖춘 것으로 인정(認定)된다.

• 한국항해항만학회:학술대회논문집
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• 한국항해항만학회 2006년도 International Symposium on GPS/GNSS Vol.2
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• pp.359-364
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• 2006

Interference can seriously degrade the performance of GPS receiver because GPS signal has extremely low power at earth surface. This paper presents a Narrowband Interference Excision Filter (NIEF) in frequency domain that removes narrowband interferences with small signal loss. A NIEF transforms the received GPS signals with interferences into the frequency domain with FFT and then compute statistics such as mean and standard deviation to determine an excision threshold. All spectrums exceeding the threshold are removed and the remaining spectrums are restored by IFFT. A NIEF effectively can remove various and strong interferences with a simple structure. However, the signal power loss is unavoidable during FFT and IFFT. Besides the hamming window and overlap technique, a threshold-whitening technique and an adaptive detection threshold are adopted to effectively reduce the signal power loss. The performance of implemented NIEF is evaluated using real signals obtained by 12 bit GPS signal acquisition board. The output of NIEF is fed into the Software Defined Receiver to evaluate the acquisition and tracking performance. Experimental results shows that many types of interference such as single-tone CWI, AM, FM, swept CWI and multi-tones CWI are effectively mitigated with small signal power loss.

• 한국산학기술학회논문지
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• 제12권7호
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• pp.3227-3235
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• 2011

이 논문에서는 관계형 임베디드 DBMS를 설계하고 프로토타입 Miracle RDBMS(MDB)를 개발하였다. MDB는 C로 개발되었고, 로컬에서 동작하며 유닉스와 윈도우즈 계열에서 운영 가능하다. SQL 인터페이스와 API 함수를 통해 데이터베이스를 접근하며 $B^+$ 트리 인덱스를 사용한다. 트랜잭션의 ACID를 보장하고 저수준의 잠금, 단일 테이블에 대한 SQL 문을 처리한다. 데이터의 처리 성능을 평가하기 위해 ARM용 EZ-S3C6410 보드를 이용하여 데이터 적재, 검색, 수정 및 삭제하는데 걸리는 시간을 실험하였다. SQLite와 처리시간을 비교해 보았는데 단위 연산에 대한 평균 처리시간이 SELECT와 INSERT에서 MDB가 각각 38.46%, 22.86% 더 빨랐으며, UPDATE와 DELETE에서 SQLite가 각각 28.33%, 26.00% 더 우수하였다. 이 실험은 데이터베이스에서 데이터를 가져오고 보내는 작업이 MDB에서 더 빠른 반면, $B^+$ 트리 인덱스는 SQLite에서 더 효율적으로 구축되었음을 보여준다.

• 한국정보통신학회논문지
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• 제19권2호
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• pp.393-400
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• 2015

최근 국내에서도 교통정보시스템의 보급 및 개발이 확산되고 일부 서비스가 시범사업을 거쳐 상용화되면서 활용도가 높은 DSRC에 대한 관심이 높아졌으며 노변기지국과 차량 설치장비용 안테나가 연구되고 있다. 차량용 안테나의 경우 크기의 소형화가 요구되어 단일패치를 이용하였으나 대부분의 경우 소형화로 인하여 성능의 저하가 있었다. 또한, 기존에 연구되고 있는 안테나는 배열을 이용하여 성능을 높이는 방법이 일부 사용되고 있으나 배열을 사용하는 경우 안테나의 크기가 커지는 단점이 있다. 그러므로 본 논문에서는 DSRC의 OBU에서 사용할 수 있는 소형이며 제작이 용이한 단순한 구조의 CPW 급전을 이용한 마이크로스트립 패치 안테나를 설계 하였다.