• Title/Summary/Keyword: simulator modeling

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Structure Modeling of Machine Tools and Internet-based Implementation (공작기계 구조 모델링과 인터넷 기반 구현)

  • Hong Dong-Phyo;Seo Yoon-Ho;Kim In-Soo;Lee Gyu-Bong;Sheen Dong-Mok
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.06a
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    • pp.785-791
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    • 2005
  • Reconfigurability of machine tools is one of the critical factors to realize the responsive manufacturing systems to satisfy the mass-customization production. This paper presents the methods to model and simulate the machine tools on Internet in response to change in the machining requirements. Specifically, a set of module combination rules and a modeling method of the structure of machine tools using connectivity graph are developed. In response to the user requirements, kinematic relations and structures of machine tools can be derived using the module combination rules and connectivity graph relationships. Internet-based simulator of machine tools is implemented and presented. The developed machine tool simulator can be used to verify the structure of machine tools derived from the user requirements.

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A study on the channel modeling for power line communication (전력선 통신 채널 모델링에 관한 연구)

  • Jeong Young-Hwa
    • The Journal of Information Technology
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    • v.6 no.3
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    • pp.1-10
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    • 2003
  • This paper is concerned with a power line channel modeling for the more fast and efficiently power line communication experiment. A capacitor load channel simulator is a essential equipment in the power line modem development for in-house network. We accomplished a channel modelling by the frequency response method about the total 298 capacitor load channels. This channel data is acquired by the capacitor load simulator modeling a real power line channel environment. When the experiment results acquired from the capacitor load simulator were compared with the result from a channel filter, we confirmed to substitute capacitor load experiments on the actual power line communication without big error.

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Performance verification on the Impedance Relay Method using Failure Simulator of AT Feeding System (AT 급전계통 고장 모의시험장치를 활용한 임피던스 계전방식의 성능검증)

  • Kim, Wan-il;Lee, Kye-Seung;Jung, No-Geon;Kim, Jae-Moon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.67 no.2
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    • pp.325-330
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    • 2018
  • In this paper, we investigated the impedance method for searching fault detection point in case of an accident in the AC electric railway AT feeding system. For this purpose, simulation circuit modeling and prototype hardware are made based on the known numerical analysis. As a result of simulation modeling of the feeding system based on the numerical analysis of the impedance method confirmed that the modeling was properly implemented with an average error rate of 0.07%. Also, as a result of fault event by hardware simulator, it was confirmed that the breaker operation time is shortened and the fault current is decreased while the voltage is close to the supply voltage in the transient state as the point of the fault accident moves away from the substation(SS).

Implementation of Design Simulator for SAW Coupled Mode Resonator Filter using a Mathematical Modeling of SAW Coupled Mode (SAW 결합 모드 공진기 필터의 수학적 모델링을 이용한 설계 시뮬레이터의 구현)

  • 정영지
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.3 no.2
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    • pp.291-304
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    • 1999
  • In this work, a mathematical modeling of SAW coupled mode in SAW resonator filter, which is very useful in analyzing the characteristics of periodic electrode structure such as SAW reflective array and inter-digital transducers. was considered by mathematical analytic approach. The design and simulation method for resonator filter was also proposed by equivalent transduction matrix using this mathematical modeling. In order for a designer to simulate, and to design the coupled mode SAW resonator filters effectively that could be applied to mobile communication system, a design simulator for coupled mode filter was implemented by graphic user interface, and it was investigated by designing and analyzing practical SAW coupled mode resonator filter from a view point of application of this simulator.

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Development of Pervaporation System Simulator (투과증발 시스템 모사기 개발)

  • 장재화;유제강;안승호;이규현;류경옥
    • Membrane Journal
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    • v.7 no.1
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    • pp.31-38
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    • 1997
  • A simulator has been developed in order to simulate and to be used to design the pervaporation system for separating organic/water mixtures. This simulator is composed of simulation engine, which includes a modeling of pervaporation system and the numerical analysis, and Graphical User Interface(GUI), which enables us to operate the simulator more easily in the Windows environment. The structure and operation of simulator were clearly presented by demonstrating the full-scale ethanol dehydration process. The performance of simulator turned out to be fairly good through comparing the simulation results with the experimental data of ethanol dehydration pilot tests.

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Object-Oriented Programming Based Chip-Mounter Simulator Using Stochastic Petri Nets (확률 페트리 네트를 이용한 객체기향 기반의 칩마운터 시뮬레이터 구현)

  • Park, Gi-Beom;Park, Tae-Hyoung
    • Journal of Institute of Control, Robotics and Systems
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    • v.7 no.6
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    • pp.540-549
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    • 2001
  • An implementation method for chip-mounter simulator is proposed to improve the productivity and utility of electronic assembly lines. The simulator emulates the assembly sequence graphically to verify the chip mounter program in offline. It also presents functions of time estimation and productivity analysis considering the error probability. To increase the flexibility of simulator, stochastic petri nets are applied to modeling of the assembly sequence. The sequence model is then implemented as extendable classes by an object oriented language. The simulator is applied to a commercial chip mounter to verify the usefulness of the method proposed.

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Modeling of Gate/Body-Tied PMOSFET Photodetector with Built-in Transfer Gate (내장된 전송게이트를 가지는 Gate/Body-Tied PMOSFET 광 검출기의 모델링)

  • Lee, Minho;Jo, Sung-Hyun;Bae, Myunghan;Choi, Byoung-Soo;Choi, Pyung;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
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    • v.23 no.4
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    • pp.284-289
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    • 2014
  • In this paper, modeling of a gate/body-tied (GBT) PMOSFET photodetector with built-in transfer gate is performed. It can control the photocurrent with a high-sensitivity. The GBT photodetector is a hybrid device consisted of a MOSFET, a lateral BJT, and a vertical BJT. This device allows for amplifying the photocurrent gain by $10^3$ due to the GBT structure. However, the operating parameters of this photodetector, including its photocurrent and transfer characteristics, were not known because modeling has not yet been performed. The sophisticated model of GBT photodetector using a process simulator is not compatible with circuit simulator. For this reason, we have performed SPICE modeling of the photodetector with reduced complexity using Cadence's Spectre program. The proposed modeling has been demonstrated by measuring fabricated chip by using 0.35 im 2-poly 4-metal standard CMOS technology.

APPLICATION AND FUNCTIONAL REQUIREMENTS OF SIMULATOR IN HARBOR AND WATERWAY DESIGN

  • Shi, Chaojian
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 2001.10a
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    • pp.142-152
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    • 2001
  • The roles and importance of the application of simulator in harbor and waterway design are emphasized. Different methods of simulation and their application are described. A large-scale simulation concept, group simulation, is proposed. Requirements of the simulator for accomplishing the tasks properly and effectively are suggested. Some points on modeling of ship hydrodynamics and environmental factors, welch are critical especially in waterway design simulation are discussed and algorisms presented.

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A Simulator for a Five-stage Pipeline DSP core (5단계 파이프라인 DSP 코어를 위한 시뮬레이터의 설계)

  • 김문경;정우경
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.1161-1164
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    • 1998
  • We designed a DSP core simulator with C language, that is able to simulate 5-stage pipelined DSP core, named YS-DSP. It can emulate all 5 stage pipelines in the DSP core. It can also emulate memory access, exception processing, and DSP parallel processing. Each pipeline stage is implemented by combination of one or more functions to process parts of each stage. After modeling and validating the simulator, we can use it to verify and to complement the DSP core HDL model and to enhance its performance.

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Development of a 3D Graphic Simulator for Assembling Robot (조립용 로봇이 3차원 그래픽 시뮬레이터 개발)

  • 장영희
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 1998.03a
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    • pp.227-232
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    • 1998
  • We developed a Off-Line Graphic Simulator which can simulate a robot model in 3D graphics space in Windows 95 version. 4 axes SCARA robot was adopted as an objective model. Forward kinematics, inverse kinematics and robot dynamics modeling were included in the developed program. The interface between users and the off-line program system in the Windows 95's graphic user interface environment was also studied. The developing language is Microsoft Visual C++. Graphic libraries, OpenGL, by Silicon Graphics, Inc. were utilized for 3D graphics.

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