• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.3
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• pp.279-284
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• 2014

This paper proposes a novel OLED pixel circuit to compensate the threshold voltage variation of p-channel low temperature polycrystalline silicon thin-film transistors (LTPS TFTs). The proposed 5-TFT OLED pixel circuit consists of 4 switching TFTs, 1 OLED driving TFT and 1 capacitor. One frame of the proposed pixel circuit is divided into initialization period, threshold voltage sensing and data programming period, data holding period and emission period. SmartSpice simulation results show that the maximum error rate of OLED current is -4.06% when the threshold voltage of driving TFT varies by ${\pm}0.25V$ and that of OLED current is 9.74% when the threshold voltage of driving TFT varies by ${\pm}0.50V$. Thus, the proposed 5T1C pixel circuit can realize uniform OLED current with high immunity to the threshold voltage variation of p-channel poly-Si TFT.

• New & Renewable Energy
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• v.3 no.4
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• pp.63-68
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• 2007

유리를 기판으로 하는 superstrate pin 비정질 실리콘 태양전진에서 전면 투명전도막(TCO)과 p-층의 계면은 태양전지 변환효율에 큰 영향을 미친다. 면투명전도막(TCO)으로 현재 일반적으로 사용되는 ZnO:Al는 $SnO_2:F$보다 전기, 광학적으로 우수하고, 안개율 (Haze)높으며, 수소 플라즈마에서 안정성이 높은 특징을 갖고 있다. 그래서 박막 태양전지의 특성향상에 매우 유리하나, 태양전지로 제조했을 때, $SnO_2$보다 충진율(Fill Factor:F.F)과 $V_{oc}$가 감소한다는 단점을 가지고 있다. 본 실험실에서는 $SnO_2:F$dml F.F.가 72%이 나온 반면 ZnO:Al의 F.F은 68%에 그쳤다. 이들 원인을 분석하기 위해 TCO/p-layer의 전기적 특성을 알아 본 결과, $SnO_2:F$보다 ZnO:Al의 직렬저항이 높게 측정되었다. 이러한 결과를 바탕으로 p-layer에 $R=(H_2/SiH_4)=25$로 변화, p ${\mu}c$-Si:H/p a-SiC:H로 p-layer 이중 증착, p-layer의 boron doping 농도를 증가시키는 실험을 하였다. 직렬저항이 가장 낮았던 p ${\mu}c$-Si:H/p a-SiC:H 인 p-layer 이중 증착에서 $V_{oc}$는 0.95V F.F는 70%이상이 나왔다. 이들 각 p층의 $E_a$(Activiation Energy)를 구해본 결과, ${\mu}c$-Si:H의 Ea 가 가장 낮은 것을 관찰 할 수 있었다.

• Journal of Korean Ophthalmic Optics Society
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• v.3 no.1
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• pp.217-222
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• 1998

Coating films of $SiO_2-TiO_2-AgO$ have been prepared on soda-lime-silica slide glasses and single crystal silicon wafer by the sol-gel method using a spin-coating technique. Commercially available tetraethyl orthosilicate, titanium trichloride, and silver-nitrates were used as starting materials. The heat treatment temperature of this coating films was $500^{\circ}C$ properly, obtained from TG-DTA result. The films with thickness of 310 nm were prepared by 5 times coating. In the case of l0 mol% AgO, the film showed a crack-free and smooth surface, but the higher Ago content exhibited the more pin hole and the segregated cluster of AgO. The IR absorbance of the films decreased in the range of 400 nm to 700 nm with the increase of annealing temperature. And the reflectance of the coating films decreased and the color was changed light yellow to white yellow with the increase of Ago content.

• Journal of Electrical Engineering and information Science
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• v.3 no.2
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• pp.239-244
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• 1998

Piezoelectric pressure sensors and pyroelectric infrared detectors based on ZnO thin film have been integrated with GaAs metal-semiconductor field effect transistor (MESFET) amplifiers. Surface micromachining techniques have been applied in a GaAs MESFET process to form both microsensors and electronic circuits. The on-chip integration of microsensors such as pressure sensors and infrared detectors with GaAs integrated circuits is attractive because of the higher operating temperature up to 200 oC for GaAs devices compared to 125 oC for silicon devices and radiation hardness for infrared imaging applications. The microsensors incorporate a 1${\mu}$m-thick sputtered ZnO capacitor supported by a 2${\mu}$m-thick aluminum membrane formed on a semi-insulating GaAs substrate. The piezoelectric pressure sensor of an area 80${\times}$80 ${\mu}$m2 designed for use as a miniature microphone exhibits 2.99${\mu}$V/${\mu}$ bar sensitivity at 400Hz. The voltage responsivity and the detectivity of a single infrared detector of an area 80${\times}$80 $\mu\textrm{m}$2 is 700 V/W and 6${\times}$108cm$.$ Hz/W at 10Hz respectively, and the time constant of the sensor with the amplifying circuit is 53 ms. Circuits using 4${\mu}$m-gate GaAs MESFETs are fabricated in planar, direct ion-implanted process. The measured transconductance of a 4${\mu}$m-gate GaAs MESFET is 25.6 mS/mm and 12.4 mS/mm at 27 oC and 200oC, respectively. A differential amplifier whose voltage gain in 33.7 dB using 4${\mu}$m gate GaAs MESFETs is fabricated for high selectivity to the physical variable being sensed.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.2
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• pp.207-212
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• 2013

A novel pixel circuit that uses only n-type low-temperature polycrystalline silicon (poly-Si) thin-film transistors (LTPS-TFTs) to compensate the threshold voltage variation of a OLED driving TFT is proposed. The proposed 6T1C pixel circuit consists of 5 switching TFTs, 1 OLED driving TFT and 1 capacitor. When the threshold voltage of driving TFT varies by ${\pm}0.33$ V, Smartspice simulation results show that the maximum error rate of OLED current is 7.05 % and the error rate of anode voltage of OLED is 0.07 % at Vdata = 5.75 V. Thus, the proposed 6T1C pixel circuit can realize uniform output current with high immunity to the threshold voltage variation of poly-Si TFT.

• The Korean Journal of Ceramics
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• v.2 no.1
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• pp.19-24
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• 1996

The phase distribution and interface chemistry by the solid-state reaction between SiC and nickel were studied at temperatures between $550 \;and\; 1250^{\circ}C$ for 0.5-100 h. The reaction with the formation of silicides and carbon was first observed above $650^{\circ}C$. At $750^{\circ}C$, as the reaction proceeded, the initially, formed $Ni_3Si_2$ layer was converted to $Ni_2$Si. The thin nickel film reacted completely with SiC after annealing at $950^{\circ}C$ for 2 h. The thermodynamically stable $Ni_2$Si is the only obsrved silicide in the reaction zone up to $1050^{\circ}C$. The formation of $Ni_2$Si layers with carbon precipitates alternated periodically with the carbon free layers. At temperatures between $950^{\circ}C$ and $1050^{\circ}C$, the typical layer sequences in the reaction zone is determined by quantitative microanalysis to be $SiC/Ni_2$$Si+C/Ni_2$$Si/Ni_2$$Si+C/…Ni_2$Si/Ni(Si)/Ni. The mechanism of the periodic band structure formation with the carbon precipitation behaviour was discussed in terms of reaction kinetics and thermodynamic considerations. The reaction kinetics is proposed to estimate the effective reaction constant from the parabolic growth of the reaction zone.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.12
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• pp.761-767
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• 1999

Poly-Si TFTs(polycrystalline silicon thin film transistors) fabricated on a low cost glass substrate have attracted a considerable amount of attention for pixel elements and peripheral driving circuits in AMLCS(active matrix liquid crystal display). In order to apply poly-Si TFTs for high resolution AMLCD, a high operating frequency and reliable circuit performances are desired. A new poly-Si TFT with CLBT(counter doped lateral body terminal) is proposed and fabricated to suppress kink effects and to improve the device stability. And this proposed device with BC(buried channel) is fabricated to increase ON-current and operating frequency. Although the troublesome LDD structure is not used in the proposed device, a low OFF-current is successfully obtained by removing the minority carrier through the CLBT. We have measured the dynamic properties of the poly-Si TFT device and its circuit. The reliability of the TFTs and their circuits after AC stress are also discussed in our paper. Our experimental results show that the BC enables the device to have high mobility and switching frequency (33MHz at $V_{DD}$ = 15 V). The minority carrier elimination of the CLBT suppresses kink effects and makes for superb dynamic reliability of the CMOS circuit. We have analyzed the mechanism in order to see why the ring oscillators do not operate by analyzing AC stressed device characteristics.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.4
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• pp.45-52
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• 2009

We proposed a new pixel circuit and driving method for the large-area, high-luminance AMOLED applications in this study. We designed with the low-temperature poly-silicon(LTPS) thin film transistors(TFTs) that has poor uniformity but stable characteristic. To improve the uniformity of an image, the threshold voltage($V_{TH}$) and the mobility of the TFTs can be compensated together. The proposed method overcomes the previous methods for mobility compensation, and that is profitable for large-area applications. Black data insertion was introduced to improve the characteristics for moving images. AMOLED panel can operate in two compensation mode, so the luminance degradation by mobility compensation can be released. The scan driver for controlling the pixel circuits were optimized, and the compensation mode can be controlled simply by that. Final driving signal has large timing margin, and the panel operates stably. The pixel circuit was designed for 14.1" WXGA top-emission ANGLED panel. The non-uniformity of the designed panel was estimated under 5% for the mobility compensation time of 1us.

• 한국신재생에너지학회:학술대회논문집
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• 2007.11a
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• pp.275-277
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• 2007

유리를 기판으로 하는 superstrate pin 비정질 태양전지에서 전면투명전도막(TCO)과 p-layer의 계면이 태양전지의 효율을 내는데 가장 큰 기여를 한다. 전면투명전도막(TCO)으로 현재 일반적으로 사용되는 ZnO:Al는 $SnO_2:F$ 보다 전기,광학적으로 우수하고, 안개율(Haze)높으며, 수소 플라즈마에서의 안정성이 높은 특정을 갖고 있다. 그래서 박막 태양전지 특성향상에 매우 유리하나, 태양전지로 제조했을 때, $SnO_2:F$보다 충진율(Fill factor:F.F)과 V_{\infty}$ 가 감소한다는 단점을 가지고 있다. 본 실험실에서는 $SnO_2:F$의 F.F가 72%이 나온 반면 ZnO:Al의 F.F은 68%에 그쳤다. 이들 원인을 분석하기 위해 TCO/p-layer의 전기적 특성을 알아 본 결과, $SnO_2:F$보다 ZnO:Al의 직렬저항이 높게 측정되었다. 이러한 결과를 바탕으로 p-layer 에 R={$H_2/SiH_4$}=25로 변화, p ${\mu$}c$-Si:H/p a-SiC:H 로 p-layer 이중 증착, p-layer의 boron doping 농도를 증가시키는 실험을 하였다. 직렬저항이 가장 낮았던 p ${\mu$}c$-Si:H/p a-SiC:H 로 p-layer 이중 증착에서 Voc는 0.95V F.F는 70% 이상이 나왔다. 이들 각 p층의 $E_a$(Activation Energy)를 구해본 결과, ${\mu$}c$-Si:H의 Ea 가 가장 낮은 것을 관찰 할 수 있었다.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.71-71
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• 1999

현재 소자 제작에 응용되는 수소화된 비정질 실리콘은 PECVD 방법으로 제작하는 것이 보편적인 방법이다. 그러나 비정질 실리콘 박막 트랜지스터는 band gap edge 근처에서 국재준위가 많아 mobility가 작으며 상온에서 조차 불안정하여 신뢰성이 높지 않고, 도핑된 비정질 실리콘의 높은 비저항 등의 단점으로 인하여 고속 회로에 응용이 불가능하다. 반면 다결정질 실리콘 박막 트랜지스터는 a-Si:H TFT 에 비해 재현성이 우수하고 high resolution, high resolution, high contrast LCD에 응용할 수 있다. 하지만, 다결정 실리콘의 grain boundary로 인해 단결정에 비해 많은 defect 들이 존재하여 전도성을 감소시킨다. 따라서 Mobility를 증가시키기 위해서 grain size를 증가시키고 grain boundary 내에 존재하는 trap center를 감소시켜야 한다. 따라서 본 실험에서는 PECVD 장비로 초기 기판을 plasma 처리하여 다결정 실리콘 박막을 제작하여, 기판 처리에 대한 다결정 실리콘 박막의 성장의 특성을 조사하였다. 실험 방법으로는 PECVD 시스템을 이용하여 SiH4 gas와 H2 gas를 선택적으로 증착시키는 LBL 방법을 사용하여 $\mu$c-Si:H 박막을 제작하였다. 비정질 층을 gas plasma treatment 하여 다결정질 실리콘의 증착 initial stage 관찰을 주목적으로 관찰하였다. 다결정 실리콘 박막의 구조적 성질을 조사하기 위하여 Raman, AFM, SEM, XRD를 이용하여 grain 크기와 결정화도에 대해 측정하여 결정성장 mechanism을 관측하였다. LBL 방법으로 증착시킨 박막의 Raman 분석을 통해서 박막 증착 초기에 비정질이 증착된 후에 결정질로 상태가 변화됨을 관측할 수 있었고, SEM image를 통해서 증착 회수를 증가시키면서 grain size가 작아졌다 다시 커지는 현상을 볼 수 있었다. 이 비정질 층의 transition layer를 gas plasma 처리를 통해서 다결정 핵 형성에 영향을 관측하여 적정한 gas plasma를 통해서 다결정질 실리콘 박막 증착 공정을 단축시킬 수 있는 가능성을 짐작할 수 있었고, 또한 표면의 roughnes와 morphology를 AFM을 통하여 관측함으로써 다결정 박막의 핵 형성에 알맞은 증착 표면 특성을 분석 할 수 있었다.