• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.604-604
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• 2012

기존의 실리콘 이종접합 태양전지는 후면에도 passivation layer인 i-a-Si:H 및 BSF층인 n-a-Si:H가 형성되는 구조를 가지고 있었다. 이러한 구조를 대체하기 위하여 본 연구에서는 실리콘 이종접합 태양전지의 후면 구조에 passivation 층 및 BSF층을 novel material인 Sb증착 및 RTP, laser anneal을 통해 새로운 BSF층 형성하고 태양전지 특성에 대해서 분석하였다. 이를 위해서 carrier lifetime, LIV, DIV 및 QE 등 전기적, 광학적 분석뿐만 아니라 SIMS 분석을 통하여 laser annealing 공정으로 형성된 BSF층의 depth profile 분석도 진행하였다. 또한 wafer orientation에 따른 특성을 분석하기 위하여 (100) 및 (111) wafer를 이용하여 분석하였다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.6
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• pp.30-37
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• 1989

The PIN type a-SiC:H/a-Si:H heterojunction solar cells were fabricated by using the rf glow discharge decomposition of $SiH_4$ mixed with $CH_4,B_2,H_6\;and\;PH_3.$ The efficiency of the solar cell of the $SnO_2/ITO$ was higher than that of ITO transparent oxide layer by 1.5%. The P layer was prepared with the thickness of $100{\AA}$ and $CH_4/SiH_4$ ration of 5. The I layer has been deposited on the P layer and it is not pure intrinsic but near N type. So $SiH_4$ mixed with $B_2H_6$ of 0.3ppm was used to change this N type nature to intrinsic having the thickness of 5000${\AA}$. And consecutively, the N layer was deposited with t ethickness of $400{\AA}$ using $SiH_4/PH_3$ mixtures. The solar cell demonstrated 0.94V of $V_{oc'}$ 14.6mA/cm of $J_{sc}$ and 58.2% of FF, resulting the efficiency of 8.0%. To minimize loss by the reflection of light, $MgF_2$ layer was coated on the lgass and the efficiency was improved by 0.5%. Therefore, the solar cell indicated overall efficiency of 8.5%.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.34 no.4
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• pp.251-255
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• 2021

a-Si is commonly considered as a primary candidate for the formation of passivation layer in heterojunction (HIT) solar cells. However, there are some problems when using this material such as significant losses due to recombination and parasitic absorption. To reduce these problems, a wide bandgap material is needed. A wide bandgap has a positive influence on effective transmittance, reduction of the parasitic absorption, and prevention of unnecessary epitaxial growth. In this paper, the adoption of a-SiO_x:H as the intrinsic layer was discussed. To increase lifetime and conductivity, oxygen concentration control is crucial because it is correlated with the thickness, bonding defect, interface density (D_it), and band offset. A thick oxygen-rich layer causes the lifetime and the implied open-circuit voltage to drop. Furthermore the thicker the layer gets, the more free hydrogen atoms are etched in thin films, which worsens the passivation quality and the efficiency of solar cells. Previous studies revealed that the lifetime and the implied voltage decreased when the a-SiOx thickness went beyond around 9 nm. In addition to this, oxygen acted as a defect in the intrinsic layer. The D_it increased up to an oxygen rate on the order of 8%. Beyond 8%, the D_it was constant. By controlling the oxygen concentration properly and achieving a thin layer, high-efficiency HIT solar cells can be fabricated.

• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.89-89
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• 2009

높은 소수반송자 수명(life-time)을 가지는 고품위 실리콘 기판은 고효율 실리콘 이종접합 태양전지 제작을 위한 중요 요소 기술 중 하나이다. 본 연구에서는 n-type c-Si 기판을 이용한 고효율 실리콘 이종접합 태양전지제작을 위해 hot water oxidation(HWO) 공정을 이용하여 고품위 실리콘 기판을 제작하였다. 실리콘 기판의 특성 분석은 Qusi-steady state photoconductance (QSSPC)를 이용하여 소수반송자 수명을 측정하였으며, 기판의 면저항 및 wetting angle을 측정하여 공정에 따른 특성변화를 분석하였다. Saw damage etching 된 기판을 웨이퍼 표면으로부터 particle, 금속 불순물, 유기물 등의 오염을 제거하기 위해 $60{\sim}85^{\circ}C$로 가열된 Ammonia수, 과산화수소수($NH_4OH/H_2O_2/H_2O$), 염산 과산화수소수($HCL/H_2O_2/H_2O$) 및 실온 희석불산(DHF) 중에 기판을 각각 10분 정도씩 침적하여, 각각의 약액 처리 후에 매회 10분 정도씩 순수(DI water)에서 rinse하여 RCA 세정을 진행한 후 HWO 공정을 통해 기판 표면에 얇은 산화막 을 형성시켜 패시베이션 해주었다. HF를 이용하여 자연산화막을 제거시 HWO 공정을 거친 기판은 매끄러운 표면과 패시베이션 영향으로 기판의 소수 반송자 수명이 증가하며, 태양전지 제작시 접촉저항을 감소시켜 효율을 증가 시킬수 있다. HWO 공정은 반응조 안의 DI water 온도와 반응 시간에 따라 life-time을 측정하여 진행하였으며, 이후 PE-CVD법으로 증착된 a-Si:H layer 및 투명전도 산화막, 금속전극을 증착하여 실리콘 이종접합 태양전지를 제작하였다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.6
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• pp.603-609
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• 2022

Passivation quality is mainly governed by epitaxial growth of crystalline silicon wafer surface. Void-rich intrinsic a-Si:H interfacial layer could offer higher resistivity of the c-Si surface and hence a better device efficiency as well. To reduce the resistivity of the contact area, a modification of void-rich intrinsic layer of a-Si:H towards more ordered state with a higher density is adopted by adapting its thickness and reducing its series resistance significantly, but it slightly decreases passivation quality. Higher resistance is not dominated by asymmetric effects like different band offsets for electrons or holes. In this study, multilayer of intrinsic a-Si:H layers were used. The first one with a void-rich was a-Si:H(I₁) and the next one a-SiO_x:H(I₂) were used, where a-SiO_x:H(I₂) had relatively larger band gap of ~2.07 eV than that of a-Si:H (I₁). Using a-SiO_x:H as I₂ layer was expected to increase transparency, which could lead to an easy carrier transport. Also, higher implied voltage than the conventional structure was expected. This means that the a-SiO_x:H could be a promising material for a high-quality passivation of c-Si. In addition, the i-a-SiO_x:H microstructure can help the carrier transportation through tunneling and thermal emission.