• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1772-1775
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• 2000

We have fabricated poly-Si TFTs by two-step crystallizaton. Poly-Si films have been prepared by furnace annealing(FA) and rapid thermal annealing(RTA) followed by subsequent the post-annealing, excimer laser annealing. The measured crystallinity of RTA and FA annealed poly-Si film is 77% and 68.5%, respectively. For two-step annealed poly-Si film, the crystallinity has been drastically to 87.7% and 86.3%. The RMS surface roughness from AFM results have been improved from 56.3${\AA}$ to 33.5${\AA}$ after post annealing. The measured transfer characteristics of the two-step annealed poly-Si TFTs have been improved significantly for the both FA-ELA and RTA-ELA. Leakage currents of two-step annealed poly-Si TFTs are lower than that of the devices by FA and RTA. From these results, we can describe the fact that the intra-grain defects has been cured drastically by the post-annealing.

• KIEE International Transactions on Electrophysics and Applications
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• v.4C no.3
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• pp.111-116
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• 2004

The Ni/SiC Schottky diode was fabricated with the $\alpha$-SiC thin film grown by the ICP-CVD method on a (111) Si wafer. $\alpha$-SiC film has been grown on a carbonized Si layer in which the Si surface was chemically converted to a very thin SiC layer achieved using an ICP-CVD method at $700^{\circ}C$. To reduce defects between the Si and $\alpha$-SiC, the surface of the Si wafer was slightly carbonized. The film characteristics of $\alpha$-SiC were investigated by employing TEM (Transmission Electron Microscopy) and FT-IR (Fourier Transform Infrared Spectroscopy). Sputterd Ni thin film was used as the anode metal. The boundary status of the Ni/SiC contact was investigated by AES (Auger Electron Spectroscopy) as a function of the annealing temperature. It is shown that the ohmic contact could be acquired beyond a 100$0^{\circ}C$ annealing temperature. The forward voltage drop at 100A/cm was I.0V. The breakdown voltage of the Ni/$\alpha$-SiC Schottky diode was 545 V, which is five times larger than the ideal breakdown voltage of the silicon device. As well, the dependence of barrier height on temperature was observed. The barrier height from C- V characteristics was higher than those from I-V.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.6
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• pp.580-585
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• 2004

Silicon dioxide (SiO$_2$) is widely used as a gate dielectric material for thin film transistors (TFT) and semiconductor devices. In this paper, SiO$_2$ films were grown by APCVD(Atmospheric Pressure chemical vapor deposition) at the high temperature. Experimental investigations were carried out as a function of $O_2$ gas flow ratios from 0 to 200 1pm. This article presents the SiO$_2$ gate dielectric studies in terms of deposition rate, refrative index, FT-IR, C-V for the gate dielectric layer of thin film transistor applications. We also study defect passivation technique for improvement interface or surface properties in thin films. Our passivation technique is Forming Gas Annealing treatment. FGA acts passivation of interface and surface impurity or defects in SiO$_2$ film. We used RTP system for FGA and gained results that reduced surface fixed charge and trap density of midgap value.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05c
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• pp.149-153
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• 2003

Chemical mechanical polishing (CMP) technology for global planarization of multi-level inter-connection structure has been widely studied for the next generation devices. CMP process has been paid attention to planarized pre-metal dielectric (PMD), inter-layer dielectric (ILD) interconnections. Expecially, shallow trench isolation (STI) used to CMP process on essential. Recently, the direct STI-CMP process without the conventional complex reverse moat etch process has established by using slurry additive with the high selectivity between $SiO_2$ and $Si_3N_4$ films for the purpose of process simplification and n-situ end point detection(EPD). However, STI-CMP process has various defects such as nitride residue, tom oxide and damage of silicon active region. To solve these problems, in this paper, we studied the planarization characteristics using a high selectivity slurry(HSS). As our experimental results, it was possible to achieve a global planarization and STI-CMP process could be dramatically simplified. Also we estimated the reliability through the repeated tests with the optimized process conditions in order to identify the reproducibility of HSS STI-CMP process.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.2
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• pp.98-102
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• 2010

This paper describes that single crystalline 3C-SiC (cubic silicon carbide) thin films have been deposited on carbonized Si(100) substrates using hexamethyldisilane (HMDS, $Si_2(CH_3){_6}$) as a safe organosilane single precursor and a nonflammable mixture of Ar and $H_2$ gas as the carrier gas by APCVD at $1280^{\circ}C$. The deposition was performed under various conditions to determine the optimized growth condition. The crystallinity of the 3C-SiC thin film was analyzed by XRD (X-ray diffraction). The surface morphology was also observed by AFM (atomic force microscopy) and voids between SiC and Si interfaces were measured by SEM (scanning electron microscopy). Finally, residual strain and hall mobility was investigated by surface profiler and hall measurement, respectively. From these results, the single crystalline 3C-SiC film had a good crystal quality without defects due to viods, a low residual stress, a very low roughness.

• Journal of the Korean Vacuum Society
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• v.9 no.3
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• pp.267-272
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• 2000

Electroplating Cu was deposited on Si(100) wafer after seed Cu was deposited by sputtering first. TaN was deposited as a diffusion barrier before depositing the seed Cu. Electroplating Cu thin films show highly (111)-oriented microstructure for both before and after annealing at $450^{\circ}C$ for 30min and no copper silicide was detected in the same samples, which indicates that TaN barrier layer blocks well the Cu diffusion into silicon substrate. After annealing the electroplating Cu film up to $450^{\circ}C$, the Cu film became columnar from non-columnar, its grain size became larger about two times, and also defects density of stacking faults, twins and dislocations decreased greatly. Thus the heat treatment will improve significantly electromigration property caused by the grain boundary in the Cu thin films.

• Advances in Energy Research
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• v.3 no.2
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• pp.117-124
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• 2015

In this paper, we have reported an enhancement in thermoelectric properties of un-doped zinc oxide (ZnO) grown by molecular beam epitaxy (MBE) on silicon (001) substrate by annealing treatment. The grown ZnO thin films were annealed in oxygen environment at $500^{\circ}C-800^{\circ}C$, keeping a step of $100^{\circ}C$ for one hour. Room temperature Seekbeck measurements showed that Seebeck coefficient and power factor increased from 222 to $510{\mu}V/K$ and $8.8{\times}10^{-6}$ to $2.6{\times}10^{-4}Wm^{-1}K^{-2}$ as annealing temperature increased from 500 to $800^{\circ}C$ respectively. This observation was related with the improvement of crystal structure of grown films with annealing temperature. X-ray diffraction (XRD) results demonstrated that full width half maximum (FWHM) of ZnO (002) plane decreased and crystalline size increased as the annealing temperature increased. Photoluminescence study revealed that the intensity of band edge emission increased and defect emission decreased as annealing temperature increased because the density of oxygen vacancy related donor defects decreased with annealing temperature. This argument was further justified by the Hall measurements which showed a decreasing trend of carrier concentration with annealing temperature.

• Nuclear Engineering and Technology
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• v.55 no.1
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• pp.209-214
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• 2023

The effect of thermal annealing on defect recovery of in-core neutron-irradiated 4H-SiC was investigated. Au/SiC Schottky diodes were manufactured using a 4H-SiC epitaxial wafer that was neutron-irradiated at the HANARO research reactor. The electrical characteristics of their epitaxial layers were analyzed under various conditions, including different neutron fluences (1.3 × 10¹⁷ and 2.7 × 10¹⁷ neutrons/cm²) and annealing times (up to 2 h at 1700 ℃). Capacity-voltage measurements showed high carrier compensation in the neutron-irradiated samples and a recovery tendency that increased with annealing time. The carrier density could be recovered up to 77% of the bare sample. Deep-level-transient spectroscopy revealed intrinsic defects of 4H-SiC with energy levels 0.47 and 0.68 eV below the conduction-band edge, which were significantly increased by in-core neutron irradiation. A previously unknown defect with a high electron-capture cross-section was discovered at 0.36 eV below the conduction-band edge. All defect concentrations decreased with 1700 ℃ annealing; the decrease was faster when the defect level was shallow.

• Journal of the Korean Vacuum Society
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• v.14 no.2
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• pp.78-83
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• 2005

Nanometric crystalline silicon (no-Si) embedded in dielectric medium has been paid attention as an efficient light emitting center for more than a decade. In nc-Si, excitonic electron-hole pairs are considered to attribute to radiative recombination. However the surface defects surrounding no-Si is one of non-radiative decay paths competing with the radiative band edge transition, ultimately which makes the emission efficiency of no-Si very poor. In order to passivate those defects - dangling bonds in the $Si:SiO_2$ interface, hydrogen is usually utilized. The luminescence yield from no-Si is dramatically enhanced by defect termination. However due to relatively high mobility of hydrogen in a matrix, hydrogen-terminated no-Si may no longer sustain the enhancement effect on subsequent thermal processes. Therefore instead of easily reversible hydrogen, phosphorus was introduced by ion implantation, expecting to have the same enhancement effect and to be more resistive against succeeding thermal treatments. Samples were Prepared by 400 keV Si implantation with doses of $1\times10^{17}\;Si/cm^2$ and by multi-energy Phosphorus implantation to make relatively uniform phosphorus concentration in the region where implanted Si ions are distributed. Crystalline silicon was precipitated by annealing at $1,100^{\circ}C$ for 2 hours in Ar environment and subsequent annealing were performed for an hour in Ar at a few temperature stages up to $1,000^{\circ}C$ to show improved thermal resistance. Experimental data such as enhancement effect of PL yield, decay time, peak shift for the phosphorus implanted nc-Si are shown, and the possible mechanisms are discussed as well.

• Proceedings of the Korea Association of Crystal Growth Conference
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• 1996.06a
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• pp.179-200
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• 1996

The intrinsic instabilities of fluid flow occurred in the melt of the Czochralski crystal growth system Czochralski method, asymmetric flow patterns and temperature profiles in the melt have been studied by many researchers. The idea that the non-symmetric structure of the growing equipment is responsible for the asymmetric profiles is usually accepted at the first time. However further researches revealed that some intrinsic instabilities not related to the non-symmetric equipment structure in the melt could also appear. Ristorcelli had pointed out that there are many possible causes of instabilities in the melt. The instabilities appears because of the coupling effects of fluid flow and temperature profiles in the melt. Among the instabilities, the B nard type instabilities with no or low crucible rotation rates are analyzed by the visualizing experiments using X-ray radiography and the 3-D numerical simulation in this study. The velocity profiles in the Silicon melt at different crucible rotation rates were measured using X-ray radiography method using tungsten tracers in the melt. The results showed that there exits two types of fluid flow mode. One is axisymmetric flow, the other is asymmetric flow. In the axisymmetric flow, the trajectory of the tracers show torus pattern. However, more exact measurement of the axisymmetrc case shows that this flow field has small non-axisymmetric components of the velocity. When fluid flow is asymmetric, the tracers show random motion from the fixed view point. On the other hand, when the observer rotates to the same velocity of the crucible, the trajectory of the tracer show a rotating motion, the center of the motion is not same the center of the melt. The temperature of a point in the melt were measured using thermocouples with different rotating rates. Measured temperatures oscillated. Such kind of oscillations are also measured by the other researchers. The behavior of temperature oscillations were quite different between at low rotations and at high rotations. Above experimental results means that the fluid flow and temperature profiles in the melt is not symmetric, and then the mode of the asymmetric is changed when rotation rates are changed. To compare with these experimental results, the fluid flow and temperature profiles at no rotation and 8 rpm of crucible rotation rates on the same size of crucible is calculated using a 3-dimensional numerical simulation. A finite different method is adopted for this simulation. 50×30×30 grids are used. The numerical simulation also showed that the velocity and flow profiles are changed when rotation rates change. Futhermore, the flow patterns and temperature profiles of both cases are not axisymmetric even though axisymmetric boundary conditions are used. Several cells appear at no rotation. The cells are formed by the unstable vertical temperature profiles (upper region is colder than lower part) beneath the free surface of the melt. When the temperature profile is combined with density difference (Rayleigh-B nard instability) or surface tension difference (Marangoni-B nard instability) on temperature, cell structures are naturally formed. Both sources of instabilities are coupled to the cell structures in the melt of the Czochralski process. With high rotation rates, the shape of the fluid field is changed to another type of asymmetric profile. Because of the velocity profile, isothermal lines on the plane vertical to the centerline change to elliptic. When the velocity profiles are plotted at the rotating view point, two vortices appear at the both sides of centerline. These vortices seem to be the main reason of the tracer behavior shown in the asymmetric velocity experiment. This profile is quite similar to the profiles created by the baroclinic instability on the rotating annulus. The temperature profiles obtained from the numerical calculations and Fourier transforms of it are quite similar to the results of the experiment. bove esults intend that at least two types of intrinsic instabilities can occur in the melt of Czochralski growing systems. Because the instabilities cause temperature fluctuations in the melt and near the crystal-melt interface, some defects may be generated by them. When the crucible size becomes large, the intensity of the instabilities should increase. Therefore, to produce large single crystals with good quality, the behavior of the intrinsic instabilities in the melt as well as the effects of the instabilities on the defects in the ingot should be studied. As one of the cause of the defects in the large diameter Silicon single crystal grown by the