• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.10
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• pp.2207-2216
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• 2012

Recently, wireless Internet environment with mobile phones and wireless sensor networks with severe resource restrictions have been actively studied. Moreover, an overall security issues are essential to build a reliable and secure sensor network. One of secure solution is to develop a fast cryptographic algorithm for data encryption. Therefore, we propose a 128-bit stream cipher, AA128 which has efficient implementation of software and hardware and is suitable for real-time applications such as wireless Internet environment with mobile phones, wireless sensor networks and Digital Right Management (DRM). AA128 is stream cipher which consists of 278-bit ASR and non-linear transformation. Non-linear transformation consists of Confusion Function, Nonlinear transformation(SF0 ~ SF3) and Whitening. We show that the proposed stream cipher AA128 is faster than AES and Salsa20, and it satisfies the appropriate security requirements. Our hardware simulation result indicates that the proposed cipher algorithm can satisfy the speed requirements of real-time processing applications.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.454-464
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• 2002

In the ATM-PON (Asynchronous Transfer Mode-Passive Optical Network), the downstream cell transmitted by an OLT is broadcast to all ONUs. The ONU receives selectively its own cells by VP filtering. On the other hand, the upstream cell can be transmitted by ONU in the case of receiving a grant from the OLT. After providing the grant to an ONU, the OLT expects the arrival of a cell after an elapse of the equalized round trip delay. ITU-T G.983.1 recommends that one bit error is allowed between the expected arrival time and the actual arrival time at the OLT. Because the ONU processes the different delay to each type of grant (ranging, user cell, and mimi-slot grant), it is not simple to design the transmission part of ONU. In this paper, we implement a grant processor which provides the delay accurately in the ONU TC chip with the FPGA. For the given equalized delay, it deals with the delay for the cell, the byte, and the bit unit by using the shift register, the byte counter, and the D flip-flop, respectively. We verify the operation of the grant processor by the time simulation and the measurement of the optical board output.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.7-14
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• 2005

This paper presents a new low power BIST TPG scheme. It uses a transition monitoring window (TMW) that is comprised of a transition monitoring window block and a MUX. When random test patterns are generated by an LFSR, transitions of those patterns satisfy pseudo-random gaussian distribution. The Proposed technique represses transitions of patterns using a k-value which is a standard that is obtained from the distribution of U to observe over transitive patterns causing high power dissipation in a scan chain. Experimental results show that the Proposed BIST TPG schemes can reduce scan transition by about $60\%$ without performance loss in ISCAS'89 benchmark circuits that have large number scan inputs.

• Journal of the Institute of Convergence Signal Processing
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• v.11 no.3
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• pp.244-249
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• 2010

The design of error correction code with low complexity has a good attraction for next generation multi-level cell flash memory. Sharing sub-expressions is effective method to reduce complexity and chip size. This paper proposes a new design method of m-bit parallel BCH encoder based on serial linear feedback shift register structure with low complexity using sub-expression. In addition, general algorithm for obtaining the sub-expression is introduced. The sub-expression can be expressed by matrix operation between sub-matrix of generator matrix and sum of two different variables. The number of the sub-expression is restricted by. The obtained sub-expressions can be shared for implementation of different m-parallel BCH encoder. This paper is not focused on solving a problem (delay) induced by numerous fan-out, but complexity reduction, expecially the number of gates.

• Journal of Magnetics
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• v.14 no.2
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• pp.53-61
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• 2009

Herein, different concepts for domain wall propagation based on currents and fields that could potentially be used in magnetic data storage devices based on domains and domain walls are reviewed. By direct imaging, we show that vortex and transverse walls can be displaced using currents due to the spin transfer torque effect. For the case of field-induced wall motion, particular attention is paid to the influence of localized fields and local heating on the depinning and propagation of domain walls. Using an Au nanowire adjacent to a permalloy structure with a domain wall, the depinning field of the wall, when current pulses are injected into the Au nanowire, was studied. The current pulse drastically modified the depinning field, which depended on the interplay between the externally applied field direction and polarity of the current, leading subsequently to an Oersted field and heating of the permalloy at the interface with the Au wire. Placing the domain wall at various distances from the Au wire and studying different wall propagation directions, the range of Joule heating and Oersted field was determined; both effects could be separated. Approaches beyond conventional field- and current-induced wall displacement are briefly discussed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.5C
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• pp.443-451
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• 2003

We propose an appropriate approach of defining the linear complexities (LC) of sequences over unknown symbol set. We are able to characterize those p-ary sequences whose R-tuple versions now eve. GF($p^{R}$ ) have the same characteristic polynomial as the original with respect to any basis. This leads to a construction of $p^{R}$ -ary sequences whose characteristic polynomial is essentially over GF(p). In addition, we can characterize those $p^{R}$ -ary sequences whose characteristic polynomials are uniquely determined when symbols are represented as R-tuples over GF(p) with respect to any basis.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.6A
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• pp.438-449
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• 2012

This paper presents new CRC-p codes for VHF band maritime wireless communication system based on performance analysis of various CRC codes. For this purpose, we firstly describe the method of determination of undetected error probability and minimum Hamming distance according to variation of CRC codeword length. By using the fact that the dual code of cyclic Hamming code and primitive BCH code become maximum length codes, we present an algorithm for computation of undetected error probability and minimum Hamming distance where the concept of simple hardware that is consisted of linear feedback shift register is utilized to compute the weight distribution of CRC codes. We also present construction of transmit data frame of VHF band maritime wireless communication system and specification of major communication parameters. Finally, new optimal CRC-p codes are presented based on the simulation results of undetected error probability and minimum Hamming distance using the various generator polynomials of CRC codes, and their performances are evaluated with simulation results of bit error rate based on the Rician maritime channel model and ${\pi}$/4-DQPSK modulator.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.2
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• pp.163-171
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• 2016

In order to detect the exact position of high-speed train, it is necessary to obtain location information from the transponder tag installed along the track. In this paper, we proposed parallel descrambling scheme for high-speed railway transponder system, which aims for reducing the processing time required to decode telegram. Since a telegram is stored in a tag after information bits are scrambled by an encoder, decoding procedure includes descrambling of received telegram to recover the original information bits. By analyzing the structure of the descrambling shift register circuit, we proposed a parallel descrambling scheme for fast decoding of telegram. By comparing the required number of clocks, it is shown that the proposed scheme significantly outperforms the original one.

• Journal of the Institute of Convergence Signal Processing
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• v.5 no.3
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• pp.230-235
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• 2004

This paper describes FPGA implementation of a pointer interpreter which can support a synchronization of SDH(or SONET)-based transmission network. The pointer interpreter consists of a pointer-word extractor and a pointer-word interpreter The pointer-word extractor which is composed of mod-6480 counter, shift register and pointer synchronizing block, finds out the H1 and H2 pointer word from a 51.84 Mb/s AU-3/STS-1 data frame and then performs the synchronizing with a 6.48 Mb/s by dividing them in 8. Based on the extracted pointer word, pointer-word interpreter analyzes pointer states such LOP, AIS and NORM according to pointer state-transition algorithm. It consists of a majority vote, a pointer word valid/invalid check, a pointer justification, and a pointer state check. The simulation results of Xilinx Virtex XCV200PQ240 FPGA chip shows the exact pointer word extraction and correct decision of pointer status based on extracted pointer word. The proposed pointer interpreter is suitable for pointer interpretation of 155 Mb/s STM-1/STS-3 frame.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.11 no.1
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• pp.35-42
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• 2001

The primitive polynomial on GF(q) is used in the area of the scrambler, the error correcting code and decode, the random generator and the cipher, etc. The algorithm that generates efficiently the primitive polynomial on GF(q) was proposed by A.D. Porto. The algorithm is a method that generates the sequence of the primitive polynomial by repeating to find another primitive polynomial with a known primitive polynomial. In this paper, we propose the algorithm that is improved in the A.D. Porto algorithm. The running rime of the A.D. Porto a1gorithm is O($\textrm{km}^2$), the running time of the improved algorithm is 0(m(m+k)). Here, k is gcd(k, $q^m$-1). When we find the primitive polynomial with m odor, it is efficient that we use the improved algorithm in the condition k, m>>1.