• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.06a
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• pp.544-547
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• 2007

본 연구에서는 Shallow trench isolation(STI)를 형성하기 위한 과정을 제시할 것이다. 소자간 분리를 위한 전통적인 방법으로 LOCOS(Local Oxidation of Silicon) 방식이 사용되어왔으나, 소자가 미세해짐에 따라 LOCOS 방식에서 나타나는 단차와 Birds Beak이라는 횡 방향의 산화에 의한 활성 영역의 손실을 무시할 수 없게 되어 새로운 소자 분리 방법이 필요하게 되었으며 이러한 요구에 의해 도입된 Isolation 기술이 Shallow Trench Isolation(STI) 기술이다. 다양한 etching options은 중요한 부분이다. 이 경우에 trench etching의 방향은 점점 좁아지는 측면을 경사지게 하면서 협곡을 만드는 효과적인 방법을 사용할 것이다. 본 연구에서는 좁은 협곡(Shallow trench)의 절반만 시뮬레이션 될 것이다. 만약 모든 협곡의 시뮬레이션을 필요로 한다면 다변의 etching은 사용될 수 있다. STI 공정의 핵심은 trench etch를 좁게하면서 반도체 소자를 어떻게 하면 잘 분리할 수 있는가에 있다.

• ETRI Journal
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• v.46 no.5
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• pp.783-792
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• 2024

Lithium niobate on insulator (LNOI) is a promising material platform for applications in integrated quantum photonics. A low optical loss is crucial for preserving fragile quantum states. Therefore, in this study, we have fabricated LNOI rib waveguides with a low optical propagation loss of 0.16 dB/cm by optimizing the etching conditions for various parameters. The symmetry and smoothness of the waveguides on x-cut LNOI are improved by employing a shallow etching process. The proposed method is expected to facilitate the development of on-chip quantum photonic devices based on LNOI.

• Proceedings of the KIEE Conference
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• 1993.11a
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• pp.192-194
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• 1993

In this paper, a silicon piezoresistive accelerometer of which the cantilevers have uniform thickness is designed and fabricated with SOI wafer. The accelerometer consists of a seismic mass and four cantilevers, and is fabricated mainly by the anisotropic etching method using EPW etchant. The fabrication processes are that of the frontside processes including the etching of the cantilevers and the doubleside alignment holes, the diffusion of the piezoresisters and patterning of the contact windows, and the metal connection process, and that of the backside processes including the etching of the shallow cavity and the seismic mass. Because of the uniformity of thickness, the performance of the accelerometer fabricated with SOI wafer is expected to be better than that of accelerometer fabricated by the time-controlled etching method.

• Restorative Dentistry and Endodontics
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• v.29 no.3
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• pp.273-280
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• 2004

The purpose of this study was to evaluate the etching effects and bond strength of total etching and self-etching adhesive system on unground enamel using scanning electron microscopy and microtensile bond strength test. The buccal coronal unground enamel from human extracted molars were prepared using low-speed diamond saw. Scotchbond Multi-Purpose (group SM). Clearfil SE Bond (group SE), or Adper Prompt L-Pop (group LP) were applied to the prepared teeth. and the blocks of resin composite (Filtek Z250) were built up incrementally. Resin tag formation was evaluated by scanning electron microscopy. after removal of enamel surface by acid dissolution and dehydration. For microtensile bond strength test. resin-bonded teeth were sectioned to give a bonded surface area of $1\textrm{mm}^2$. Microtensile bond strength test was perfomed. The results of this study were as follows. 1. A definite etching pattern was observed in Scotchbond Multi-Purpose group. 2. Self-etching groups were characterized as shallow and irregular etching patterns. 3. The results (mean) of microtensile bond strength were SM: 26.55 MPa, SE: 18.15 MPa, LP: 15.57 MPa. SM had significantly higher microtensile bond strength than 8E and PL (p < 0.05). but there was no significant differance between SE and PL.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.501-504
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• 1999

In the shallow trench isolation(STI) chemical mechanical polishing(CMP) process, the key issues are the optimized thickness control within- wafer-non-uniformity, and the possible defects such as nitride residue and pad oxide damage. These defects after STI CMP process were discussed to accomplish its optimum process condition. To understand its optimum process condition, overall STI related processes including reverse moat etch, trench etch, STI filling and STI CMP were discussed. It is represented that the nitride residue can be occurred in the condition of high post CMP thickness and low trench depth. In addition there are remaining oxide on the moat surface after reverse moat etch. It means that reverse moat etching process can be the main source of nitride residue. Pad oxide damage can be caused by over-polishing and high trench depth.

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.79.1-79
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• 1998

• Transactions on Electrical and Electronic Materials
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• v.10 no.6
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• pp.189-192
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• 2009

The leakage current in a CMOS image sensor (CIS) can have various origins. Leakage current investigations have focused on such things as cobalt-salicide, source and drain scheme, and shallow trench isolation (STI) profile. However, there have been few papers examining the effects on leakage current of nitride stringers that are formed by gate sidewall etching. So this study reports the results of a series of experiments on the effects of a nitride stringer on real display images. Different step heights were fabricated during a STI chemical mechanical polishing process to form different nitride stringer sizes, arsenic and boron were implanted in each fabricated photodiode, and the doping density profiles were analyzed. Electrons that moved onto the silicon surface caused the dark leakage current, which in turn brought up the speckle defect on the display image in the CIS.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.1
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• pp.1-5
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• 2001

STI(shallow trench isolation)-CMP(chemical mechanical polishing) process have been substituted for LOCOS(local oxidation of silicon) process to obtain global planarization in the below sub-0.5㎛ technology. However TI-CMP process, especially TI-CMP with RIE(reactive ion etching) etch back process, has some kinds of defect like nitride residue, torn oxide defect, etc. In this paper, we studied how to reduced torn oxide defects after STI-CMP with RIE etch back processed. Although torn oxide defects which can occur on trench area is not deep and not severe, torn oxide defects on moat area is not deep and not severe, torn oxide defects on moat area is sometimes very deep and makes the yield loss. Thus, we did test on pattern wafers which go through trench process, APECVD process, and RIE etch back process by using an IPEC 472 polisher, IC1000/SUVA4 PAD and KOH base slurry to reduce the number of torn defects and to study what is the origin of torn oxide defects.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.04b
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• pp.10-13
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• 2000

The notching effect in etching of un doped amorphous silicon gate had different characteristics and mechanism comparing with reported ones. The undoped amorphous silicon was etched by using HBr gas plasma, First, in the region of small line width, the potential was increased as a result of ions in the exposed surface of oxide, and the incident ions between the small line width were deflected more wide range, therefore the depth of notching was shallow and wide, Second, in the region of large line width of gate, electrons were charged on the top of photoresist and the side of gate, a part of ions deflected, The deflected ions were locally charged positive on the side of gate, and then the potential difference was produced, therefore, ions stored up more at independent line than at dense line, and nothing became deeper by Br ion bombardment.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.8
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• pp.651-657
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• 2000

The notching effect in etching of undoped amorphous silicon gate had different characteristics and mechanism comparing with reported ones. The undoped amorphous silicon was etched by using HBr gas plasma. First in the region of small line width the potential increased as a result of ions in the exposed surface of oxide and the incident ions between the small line widths were deflected more wide range therefore the depth of notching was shallow and wide. Second in the region of large line width of gate electrons were charged on the top of photoresist and the side of gate a part of ions deflected. The deflected ions were partly charged positive on the side of gate and then these partly charged ions produced potential difference. Therefore ions stored up more at independent line than at dense line and notching became deeper by Br ion bombardments.