• Journal of Navigation and Port Research
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• v.37 no.3
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• pp.251-256
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• 2013

This paper is mainly concerned with the ship-bank interaction by model test. The experiments for the characteristics of hydrodynamic interaction forces and moments between vessel and bank with a mound were carried out in the seakeeping and maneuvering basin. A series of tests were carried out with ship model in parallel course along a vertical sidewall with a mound with varying lateral spacing between model ship and sidewall, length of sidewall and water depth. From the experimental results, it indicated that the hydrodynamic interaction effects increase as length of sidewall with a mound increases. Furthermore, for lateral spacing less than about 0.2L between vessel and bank, it can be concluded that the bank effects increase largely as the lateral spacing between vessel and bank decreases. However, for spacing between vessel and bank more than about 0.3L, the interaction effects increase slowly as lateral spacing decreases. Also, for the water depth to draft ratio(h/d) less than about 1.5, the hydrodynamic interaction effects increase dramatically as h/d decreases.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.2
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• pp.136-140
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• 2011

The fault current limiting characteristics of the flux-lock type superconducting fault current limiter (SFCL) using a transformer winding were investigated. The suggested flux-lock type SFCL consists of two parallel connected coils on an iron core and the transformer winding connected in series with one of two coils. In this SFCL, the high-TC superconducting (HTSC) element was connected with the secondary side of the transformer. The short-circuit experimental devices to analyze the fault current limiting characteristics of the flux-lock type SFCL using the transformer winding were constructed. Through the short-circuit tests, the flux-lock type SFCL using transformer winding was shown to perform more effective fault current limiting operation compared to the previous flux-lock type SFCL without the transformer winding from the viewpoint of the quench occurrence and the recovery time of the HTSC element.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1049_1050
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• 2009

This paper deals with development of a low cost VI(Voltage-Currrent)-tracer for PV(Photovoltaic) system using LabVIEW and DSP(Digital Signal Processor). Although the conventional VI-tracer is a high cost equipment, it can‘t abstract the detailed parameters of solar cell. To overcome above mentioned disadvantages, in this paper, a converter type VI-tracer is developed. The DSP, which controls the buck-boost DC-DC converter, is used to implement the proposed VI-tracer algorithm. The proposed VI-tracer can abstract more detailed parameters of solar cell; A(temperature constant), Rs(series resistance), and Rsh(parallel resistance). The authors emphasize that the proposed VI-tracer can satisfy the users who need to get various parameters. A comparison between the proposed VI-tracer and the conventional VI-tracer is presented to show the effectiveness of the proposed system.

• Journal of Electrical Engineering and Technology
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• v.12 no.4
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• pp.1519-1528
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• 2017

The paper proposes a well structured, component count waned single phase multilevel inverter (MLI) topology, which drives three different modules viz. Stipulation Based Sources Insertion (SBSI) module, Level Count Increasing (LCI) module and Inter-Linking H-Bridge (ILHB) module. The SBSI module confronts the number of basic sources needed in series/parallel to achieve required magnitude for any particular level. The LCI possesses an offsetting dc source and opuses to increase the number of levels and the ILHB module links the SBSI and LCI modules. A developed Hybrid Pulse Width Modulation (HPWM) strategy has PWM pulses for the switches of LCI module while the switches of the remaining two modules function at fundamental switching frequency. A fifteen level version of the proposed stipulation based sources insertion MLI (SBSIMLI) topology is simulated in MATLAB R2010a and a prototype of the similar specifications is constructed to validate the performance by experimental results. The comparison between the developed SBSIMLI topology and the competent topologies shows many interesting facts.

• Structural Engineering and Mechanics
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• v.17 no.3_4
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• pp.393-408
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• 2004

There exists a clear need to monitor the performance of civil structures over their operational lives. Current commercial monitoring systems suffer from various technological and economic limitations that prevent their widespread adoption. The wires used to route measurements from system sensors to the centralized data server represent one of the greatest limitations since they are physically vulnerable and expensive from an installation and maintenance standpoint. In lieu of cables, the introduction of low-cost wireless communications is proposed. The result is the design of a prototype wireless sensing unit that can serve as the fundamental building block of wireless modular monitoring systems (WiMMS). An additional feature of the wireless sensing unit is the incorporation of computational power in the form of state-of-art microcontrollers. The prototype unit is validated with a series of laboratory and field tests. The Alamosa Canyon Bridge is employed to serve as a full-scale benchmark structure to validate the performance of the wireless sensing unit in the field. A traditional cable-based monitoring system is installed in parallel with the wireless sensing units for performance comparison.

• Journal of Advanced Navigation Technology
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• v.3 no.2
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• pp.174-184
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• 1999

In this paper, the equations which can be used to calculate the minimum series stabilizing resistance and /or the minimum parallel stabilizing conductance using the S parameters of an active device has been derived. The equation derived can be used to design a stabilizing circuit of minimum loss of a maximum available gain of a device when the circuit is adopted. For the case of KGF1254B which can be used at 1.9 GHz, the circuit proposed in this paper reduce the maximum available gain by 1 dB, while conventional simple resistor circuit reduce it by 5.2 dB.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.9
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• pp.47-56
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• 2012

This research is to develop satiable battery charger with a variety of capacity and voltage specifications of battery. For this, voltage or current were controlled through buck converter which is DC voltage that already received three-phase at primary side and passed bridge rectifier diode. And, it was comprised of full-bridge converter and HFTR for insulation and a square wave AC. The transformer primary side was comprised in series to divide certain charging current and the secondly side was comprised of 6 fixed transformers so that they can generate certain amount of power and various output voltage through relay parallel compound 6 DC Link outputs. To confirm such structure's verification and validity, simulation with PSIM was conducted, and validity of proposed variable charger system was verified through 3kW stack production.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.9
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• pp.26-32
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• 2012

This paper calculates the core and copper losses as heating sources of a 24MVA cast resin transformer, and analyzes the thermal distribution of the transformer to find out its hot-spot area by FEM program. Since the winding of the transformer is composed with many series and parallel circuits, the analyzing model of the winding is simplified and modelled by axi-symmetric domain. As the results, the maximum temperature is estimated by $137^{\circ}C$ in the upper part of the low-voltage winding. The maximum temperature has discrepancy of approximately $10^{\circ}C$, which is able to be considered as an acceptable error range in the design stage of power transformers. For the overall pattern of the temperature distribution is almost same as test results, the analyzing method can be a useful tool to find out a hot-spot area of the winding.

• Journal of information and communication convergence engineering
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• v.15 no.1
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• pp.62-71
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• 2017

This paper presents a low-power voltage converter based on a reconfigurable capacitor array. Its energy recycling capacitor array stores the energy during a charge stage and supplies the voltage during an energy recycle stage even after the power source is disconnected. The converter reconfigures the capacitor array step-wise to boost the lost voltage level during the energy recycle stage. Its energy saving is particularly effective when most of the energy remaining in the charge capacitors is wasted by the leakage current during a longer sleep period. Simulations have been conducted using a voltage source of 500 mV to supply a $V_{DD}$ of around 800 mV to a load circuit consisting of four 32-bit adders in a 65-nm CMOS process. Results demonstrate energy recycling efficiency of 85.86% and overall energy saving of 40.14% compared to a conventional converter, when the load circuit is shortly active followed by a long sleep period.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.49-51
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• 2008

본 논문은 중용량급 전원회로의 구성을 간략화 할 수 있는 절연형 AC-DC 컨버터의 구조와 그 제어 방법을 제안한다. 제안하는 회로의 구조는 병렬 전력 처리를 기반으로 한다. 병렬 모듈의 기능을 각각 AC 입력 전류의 위상을 제어하는 역률개선(PFC) 기능과, 콘덴서에 저장된 에너지를 이용하여 DC 전압을 생성하는 DC-DC 컨버터의 기능으로 분리한다. 병렬 모듈의 최종 출력단을 서로 직렬 연결하여, PFC 모듈이 생성한 전압과 DC-DC 컨버터 모듈이 생성한 전압을 서로 더해서 출력하는 구조이다. 이러한 구조를 통해서 기존의 병렬형 AC-DC 컨버터에 대비하여 반도체 소자의 내압을 감소시킬 수 있고, 최종 DC 전압의 동작응답특성 향상이 가능하다. 회로의 동작모드 분석이 실시되었고, 제어기 구현 방법이 제시되었다. 제안된 구조는 PDP 전원회로에의 응용을 위해서 400W(출력전압-200V, 출력전류-2A)급 실험용 회로를 구현하여 동작검증을 실시하였다.