• Title/Summary/Keyword: serial communication protocol

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A Study on the Channel Converting and Monitoring of the Remote Control Transceiver (원격제어 송수신기의 채널변환과 모니터용 모듈의 구현)

  • 조학현;최조천;김기문
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.3 no.2
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    • pp.347-354
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    • 1999
  • Generally, transceiver is operated to the remote control for the purpose of breading the traffic zone which is established on a mountain peak, island and building top using private line. Therefor, the remote control system of public radio station have been the very important role that is decision the quality relate to the quickness, accuracy, safety of communication on old type transceiver of SSB, VHF etc. In the case of using the only 1 private line which is exchanged voice signal with data signal had mixed or interrupted for up/down of channel, PTT control and monitoring of transmission channel and power. The up/down of channel and PTT control is according to the ASK and the data of monitoring is transfered to the FSK modulation, additional algorithm is studied on the serial protocol and traffic sequence using the MCS-51 processor in the simplex communication methode.

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ASIC Design of OpenRISC-based Multimedia SoC Platform (OpenRISC 기반 멀티미디어 SoC 플랫폼의 ASIC 설계)

  • Kim, Sun-Chul;Ryoo, Kwang-Ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.10a
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    • pp.281-284
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    • 2008
  • This paper describes ASIC design of multimedia SoC Platform. The implemented Platform consists of 32-bit OpenRISC1200 Microprocessor, WISHBONE on-chip bus, VGA Controller, Debug Interface, SRAM Interface and UART. The 32-bit OpenRISC1200 processor has 5 stage pipeline and Harvard architecture with separated instruction/data bus. The VGA Controller can display RCB data on a CRT or LCD monitor. The Debug Interface supports a debugging function for the Platform. The SRAM Interface supports 18-bit address bus and 32-bit data bus. The UART provides RS232 protocol, which supports serial communication function. The Platform is design and verified on a Xilinx VERTEX-4 XC4VLX80 FPGA board. Test code is generated by a cross compiler' and JTAG utility software and gdb are used to download the test code to the FPGA board through parallel cable. Finally, the Platform is implemented into a single ASIC chip using Chatered 0.18um process and it can operate at 100MHz clock frequency.

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KTM TOKAMAK OPERATION SCENARIOS SOFTWARE INFRASTRUCTURE

  • Pavlov, V.;Baystrukov, K.;Golobokov, Yu.;Ovchinnikov, A.;Mezentsev, A.;Merkulov, S.;Lee, A.;Tazhibayeva, I.;Shapovalov, G.
    • Nuclear Engineering and Technology
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    • v.46 no.5
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    • pp.667-674
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    • 2014
  • One of the largest problems for tokamak devices such as Kazakhstan Tokamak for Material Testing (KTM) is the operation scenarios' development and execution. Operation scenarios may be varied often, so a convenient hardware and software solution is required for scenario management and execution. Dozens of diagnostic and control subsystems with numerous configuration settings may be used in an experiment, so it is required to automate the subsystem configuration process to coordinate changes of the related settings and to prevent errors. Most of the diagnostic and control subsystems software at KTM was unified using an extra software layer, describing the hardware abstraction interface. The experiment sequence was described using a command language. The whole infrastructure was brought together by a universal communication protocol supporting various media, including Ethernet and serial links. The operation sequence execution infrastructure was used at KTM to carry out plasma experiments.

Development of a High-Resolution Electrocardiography (고해상도 심전계의 개발)

  • Lee, H.S.;Woo, E.J.;Park, S.H.;Lee, J.M.;Park, K.S.
    • Proceedings of the KOSOMBE Conference
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    • v.1996 no.05
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    • pp.179-183
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    • 1996
  • Most of the conventional electrocardiogaphies fail to detect signals other than P-QRS-T due to the limited SNR and bandwidth. High-resolution electrocardiography (HRECG) provides better SNR and wider bandwidth for the detection of micro-potentials with higher frequency components such as ventricual late potentials(LP). In this paper, we developed a HRECG using uncorrected XYZ lead. The overall gain of the amplifier is 4000 and the bandwidth is $0.5{\sim}300Hz$ without using 60Hz notch filter. Three 16-bit AH converters sample X, Y, and Z signals simultaneously with a sampling frequency of 2000Hz. Sampled data are transmitted to PC via a DMA-controlled serial communication channel using RS-485 and HDLC protocol. The noise level of the developed HRECG is less than $5{\mu}V_{rms,\;RTI}$. In order to further reduce the noise level, signal averaging technique is implemented utilizing template matching method. The SNR of the developed HRECG is high enough for the detection of LP.

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An Implementation of U Care System for Health Diagnosis (건강진단을 위한 U 케어시스템 구현)

  • Hong, Jin-Keun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.7 no.6
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    • pp.1200-1205
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    • 2006
  • In this paper, it is presented to the designed and implemented care system fur health diagnosis. The designed handhold care system is implemented by embedded Visual C++4.0 and Pocket PC2003 software development kit (SDK) in an 802.11 wireless network, and we were conducted that the research provide sufficiently the usefulness of the U health system for the collection of care management information. The proposed system is consists of care management module for health diagnosis, personal record module, data transport module, image information management module for clinic. Also, fur emergency status, transmission function of clinic information is implemented by wireless LAN protocol and serial communication.

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Development of Auto-tuning Temperature Controller with Multi-channel (다중채널을 갖는 오토튜닝 온도 제어기 개발)

  • Lee, Kap Rai
    • The Journal of the Convergence on Culture Technology
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    • v.4 no.4
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    • pp.419-427
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    • 2018
  • This paper designs and develops auto-tuning temperature controller with multi-channel, which controller with multi-channel could control a number of control system simultaneously. This controller has multi-channel input and output. And a number of control algorithms run in this controller simultaneously and independently. Firstly we present design method of controller with multi-channel. Secondly we design electrical circuit of sensor input, controller output and power control for temperature control board. And finally we design data protocol for serial communication to monitor control state and present verification of temperature controller with muiti-channel through field experiment.

A ZS Synchronization Algorithm for the Security of T1 Carrier System (T1 전송시스템 보호를 위한 ZS 동기 알고리듬)

  • 이훈재;박봉주;장병화;문상재;박영호
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.7 no.3
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    • pp.53-64
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    • 1997
  • When we apply a synchronous stream cipher to the T1 carrier system, it can occur long consecutive 0's(or 1's) sequences in the received data. In this case, it is difficult to recover receiver clock and violates a communication protocol. This paper proposes block detection and serial detection method which suppress 0's sequences of more than k( $\geq$ 2) of the stream ciphertext in the T1 carrier system. These ZS methods keep security level and solve problems of stream synchronization.

Resource Management Scheme for Improvement of Reliability and Connectivity in wireless USB System (무선 USB 시스템에서 신뢰성과 연결성 향상을 위한 자원 관리 기법)

  • Kim, Jin-Woo;Jeong, Min-A;Lee, Seong Ro
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39C no.11
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    • pp.1159-1166
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    • 2014
  • In this paper, a resource management scheme for enhancing the network connectivity and reliability in wireless USB system is proposed. Wireless USB protocol is suitable for the application that supports the real-time multimedia service in Ship Area Network since it supports high speed data transfer. However, the device's mobility is caused the dramatic change of link state and network topology, and is occurred the degradation of network performance. Therefore, a resource management scheme for wireless USB system is proposed in this paper. The proposed technique can intelligently treat the change of link state, and solve the degradation of network performance. The simulation results show that proposed protocol can enhance the throughput and delay performance by selecting relay device with better link state.

LAPG-2: A Cost-Efficient Design Verification Platform with Virtual Logic Analyzer and Pattern Generator (LAPG-2: 가상 논리 분석기 및 패턴 생성기를 갖는 저비용 설계 검증 플랫폼)

  • Hwang, Soo-Yun;Kang, Dong-Soo;Jhang, Kyoung-Son;Yi, Kang
    • Journal of KIISE:Computer Systems and Theory
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    • v.35 no.5
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    • pp.231-236
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    • 2008
  • This paper proposes a cost-efficient and flexible FPGA-based logic circuit emulation platform. By improving the performance and adding more features, this new platform is an enhanced version of our LAPG. It consists of an FPGA-based hardware engine and software element to drive the emulation and monitor the results. It also provides an interactive verification environment which uses an efficient communication protocol through a bi-directional serial link between the host and the FPGA board. The experimental results show that this new approach saves $55%{\sim}99%$ of communication overhead compared with other methods. According to the test results, the new LAPG is more area efficient in complex circuits with many I/O ports.

Development of High Performance LonWorks Based Control Modules for Network-based Induction Motor Control

  • Kim, Jung-Gon;Hong, Won?Pyo;Yun, Byeong-Ju;Kim, Dong-Hwa
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.414-420
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    • 2005
  • The ShortStack Micro Server enables any product that contains a microcontroller or microprocessor to quickly and inexpensively become a networked, Internet-accessible device. The ShortStack Micro Server provides a simple way to add LonWorks networking to new or existing smart devices. . It implements the LonTalk protocol and provides the physical interface with the LonWorks communication. The ShortStack host processor can be an 8, 16, or 32-bit microprocessor or microcontrollers. The ShortStack API and driver typically require about 4kbytes of program memory on the host processor and less than 200 bytes of RAM. The interface between host processor and the ShortStack Micro Server may be a Serial Communication Interface (SCI). The LonWorks control module with a high performance is developed, which is composed of the 8 bit PIC Microprocessor for host processor and the smart neuron chip for the ShortStack Micro Server. This intelligent control board is verified as proceeding the various function tests from experimental system with an boost pump and inverter driving systems. It is also confirmed that the developed control module provides stably 0-10VDC linear signal to the input signal of inverter driving system for varying the induction motor speed. Thus, the experimental results show that the fabricating intelligent board carried out very well the various functions in the wide operating ranges of boost pump system. This developed control module expect to apply to industrial fields to require the comparatively exact control and monitoring such as multi-motor driving system with inverter, variable air volume system and the boost pump water supply systems.

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