• E2M - 전기 전자와 첨단 소재
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• 제8권4호
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• pp.443-450
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• 1995

A directional coupler which on the X-cut $LiNbO_3$ substrate is fabricated by using proton exchange method and self-aligned method. After proton exchange process, the waveguide is formed by annealing process. The relation ship between refractive index change of waveguide and maximum output was studied along with the annealing time. A self-aligned method was used to simplify the fabrication process of the waveguide and to maximize the efficiency of electric field. The on-off state of modulator has been observered with the switching of the directional coupler by the electric field effect and also the switching voltage of the directional coupler has been measured with 8.0 [V].

• 대한전자공학회논문지
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• 제27권12호
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• pp.1841-1851
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• 1990

Self-aligned gate GaAs MESFETs using ion beam deposited tungsten applicable to GaAs LSI fabrication process have been fabricated. Silicon implanted samples were annealed using isothermla two step RTA process and conventional one step RTA process. The electrical and physicla characteristics of annealed samples were investigated using Hall and I-V measurements. As results of measurements, activation characteristics of the isothermal two step RTA process are better than those of one step annealed ones. Using the developed processes, GaAs SAFETs (Self-Aligned Gate FET) have been fabricated and electdrical characteirstics are measured. As results, subthreshold currents of SAGFETs are 6x10**-10 A/\ulcorner, that is compatible to conventional MESFET, maximum transconductances of 0.75\ulcorner gate MESFET using one step RTA process and 2\ulcorner gate MESFET using isothermal two step RTA process are 18 mS/mm, 41 mS/mm respectively.

• 대한전기학회논문지
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• 제36권7호
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• pp.462-469
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• 1987

A metal gate MOSFET with source/drain regions self-aligned to gate region is proposed. The proposed MOS transistor is fabricated by utilizing the higher oxidation rate of source/drain regions with high doping concentration when compared with channel region with moderate doping. The thick oxide on the source/drain regions reduces the gate and drain(source) overlap capacitance down to that of a self-aligned polysilicon gate device while allowing the use of a metal gate with much lower resistivity than the more commonly used polycrystalline silicon. A ring oscillator composed of 15 inverter stages has been computer simulated using SPICE. The results of the simulation show good agreement with experimental measurement confirming the fast switching speed of propesed MOSFET.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1993년도 춘계학술대회 논문집
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• pp.113-116
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• 1993

A guided - wave electro - optical modulatored directional coupler $2{\times}2$ was fabricated on X-cut $LiNbO_3$ by proton exchange wi th self-aligned method. The Electode pattern was formed by the four extra gap electrode separtion within self-aligned electrode mask. Initial cross over state turned that by controlling the anneal ing process and self-aligned electrodes are used in fabricating the electro-optical modulatored directional coupler $2{\times}2$. The modulatored directional coupler $2{\times}2$ has very good figures of merits: the measured crosstalk was -28.2 dB and the modulating valtage of 3.2[V].

• 전자공학회논문지A
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• 제32A권5호
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• pp.54-59
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• 1995

We have proposed a novel self-aligned offset gated polysilicon TFTs device without an offset mask in order to reduce a leakage current and suppress a kink effect. The photolithographic process steps of the new TFTs device are identical to those of conventional non-offset structure TFTs and an additional mask to fabricate an offset structure is not required in our device due to the self-aligned process. The new device has demonstrated a lower leakage current and a better ON/OFF current ratio compared with the conventional non-offset device. The new TFT device also exhibits a considerable reduction of the kink effect because a very thin film TFT devices may be easily fabricated due to the elimination of contact over-etch problem.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1992년도 춘계학술대회 논문집
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• pp.54-57
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• 1992

An electro-optical single modulator is fabricated in X-cut LiNbO$_3$by the annealed proton exchange and self-aligned method. First, the effect of annealing is characterized by examining single optical modulator. It is found that by controlling the annealing time, the single optical modulator can be made widely variable. The on-off state of modulator is performed by annealing process and self-aligned electrodes are used in fabricating the single modulator. The optical single modulator has very good figures of merits : the measured on-off switching voltage of about 2.7V.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 C
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• pp.1085-1087
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• 1995

A large leakage current may be one of the critical issues for poly-silicon thin film transistors(poly-Si TFTs) for LCD applications. In order to reduce the leakage current of poly-Si TFTs, several offset gated structures have been reported. However, those devices, where the offset length in the source region is not same as that in the drain region, exhibit the asymmetric electrical performances such as the threshold voltage shift and the variation of the subthreshold slope. The different offset length is caused by the additional mask step for the conventional offset structures. Also the self-aligned implantation may not be applicable due to the mis-alignment problem. In this paper, we propose a new fabrication method for poly-Si TFTs with a self-aligned offset gated structure by employing a photo resistor reflow process. Compared with the conventional poly-Si TFTs, the device is consist of two gate electrodes, of which one is the entitled main gate where the gate bias is employed and the other is the entitled subgate which is separate from both sides of the main gate. The poly-Si channel layer below the offset oxide is protected from the injected ion impurities for the source/drain implantation and acts as an offset region of the proposed device. The key feature of our new device is the offset lesion due to the offset oxide. Our experimental results show that the offset region, due to the photo resistor reflow process, has been successfully obtained in order to fabricate the offset gated poly-Si TFTs. The advantages of the proposed device are that the offset length in the source region is the same as that in the drain region because of the self-aligned implantation and the proposed device does not require any additional mask process step.

• Journal of Electrical Engineering and Technology
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• 제4권4호
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• pp.546-551
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• 2009

In this paper, we describe a self-aligned fabrication method for a nano-patterned bottom electrode using flood exposure from the backside. Misalignments between layers could cause the final devices to fail after the fabrication of the nano-scale bottom electrodes. A self-alignment was exploited to embed the bottom electrode inside the glass substrate. Aluminum patterns act as a dry etching mask to fabricate glass trenches as well as a self-aligned photomask during the flood exposure from the backside. The patterned photoresist (PR) has a negative sidewall slope using the flood exposure. The sidewall slopes of the glass trench and the patterned PR were $54.00^{\circ}$ and $63.47^{\circ}$, respectively. The negative sidewall enables an embedment of a gold layer inside $0.7{\mu}m$ wide glass trenches. Gold residues on the trench edges were removed by the additional flood exposure with wet etching. The sidewall slopes of the patterned PR are related to the slopes of the glass trenches. Nano-scale bottom electrodes inside the glass trenches will be used in beam resonators operating at high resonant frequencies.

• 한국정밀공학회지
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• 제25권8호
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• pp.17-20
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• 2008

• 대한전기학회논문지
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• 제41권5호
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• pp.573-576
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• 1992

Novel A1-Si Schottky diodes with self-aligned guard rings have been proposed and fabricated using RIE(Reactive Ion Etch). The breakdown voltage of the Schottky diode with the guard ring has been drastically increased to 200V or more in comparison with 46V for the metal overlap Schottky diode.