• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.19 no.9
• /
• pp.818-824
• /
• 2006

The effects of high-temperature process required to fabricate the SiC devices on the surface morphology and the electrical characteristics were investigated for 4H-SiC Schottky diodes. The 4H-SiC diodes without a graphite cap layer as a protection layer showed catastrophic increase in an excess current at a forward bias and a leakage current at a reverse bias after high-temperature annealing process. Moreover it seemed to deviate from the conventional Schottky characteristics and to operate as an ohmic contact at the low bias regime. However, the 4H-SiC diodes with the graphite cap still exhibited their good electrical characteristics in spite of a slight increase in the leakage current. Therefore, we found that the graphite cap layer serves well as the protection layer of silicon carbide surface during high-temperature annealing. Based on a closer analysis on electric characteristics, a conductive surface transfiguration layer was suspected to form on the surface of diodes without the graphite cap layer during high-temperature annealing. After removing the surface transfiguration layer using ICP-RIE, Schottky diode without the graphite cap layer and having poor electrical characteristics showed a dramatic improvement in its characteristics including the ideality factor[${\eta}$] of 1.23, the schottky barrier height[${\Phi}$] of 1.39 eV, and the leakage current of $7.75\{times}10^{-8}\;A/cm^{2}$ at the reverse bias of -10 V.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.08a
• /
• pp.290.1-290.1
• /
• 2013

The electrical characterization of Au islands on TiO2 at nanometer scale (as a Schottky nanodiode) has been studied with conductive atomic force microscopy in ultra-high vacuum. The diverse sizes of the Au islands were formed by using self-assembled patterns on n-type TiO2 semiconductor film using the Langmuir-Blodgett process. Local conductance images showing the current flowing through the TiN coated AFM probe to the surface of the Au islands on TiO2 was simultaneously obtained with topography, while a positive sample bias is applied. The boundary of the Au islands revealed a higher current flow than that of the inner Au islands in current AFM images, with the forward bias presumably due to the surface plasmon resonance. The nanoscale Schottky barrier height of the Au/TiO2 Schottky nanodiode was obtained by fitting the I-V curve to the thermionic emission equation. The local resistance of the Au/TiO2 nanodiode appeared to be higher at the larger Au islands than at the smaller islands. The results suggest that conductive atomic force microscopy can be used to reveal the I-V characterization of metal size dependence and the electrical effects of surface plasmon on a metal-semiconductor Schottky diode at nanometer scale.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.31 no.6
• /
• pp.367-371
• /
• 2018

1,200 V class junction barrier schottky (JBS) diodes and schottky barrier diodes (SBD) were simultaneously fabricated on the same 4H-SiC wafer. The resulting diodes were characterized at temperatures from room temperature to 473 K and subsequently compared in terms of their respective I-V characteristics. The parameters deduced from the observed I-V measurements, including ideality factor and series resistance, indicate that, as the temperature increases, the threshold voltage decreases whereas the ideality factor and barrier height increase. As JBS diodes have both Schottky and PN junction structures, the proper depletion layer thickness, $R_{on}$, and electron mobility values must be determined in order to produce diodes with an effective barrier height. The comparison results showed that the JBS diodes exhibit a larger effective barrier height compared to the SBDs.

• Proceedings of the Korean Institute of Communication Sciences Conference
• /
• 1998.10a
• /
• pp.823-826
• /
• 1998

• Proceedings of the Korean Institute of Communication Sciences Conference
• /
• 1985.10a
• /
• pp.157-160
• /
• 1985

• Proceedings of the Materials Research Society of Korea Conference
• /
• 2002.11a
• /
• pp.79-79
• /
• 2002

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.06a
• /
• pp.195-196
• /
• 2009

This paper describes the fabrication and characteristics of polycrystalline 3C-SiC thin film diodes for extreme environment applications, in which the this thin film was deposited onto oxidized Si wafers by APCVD using HMDS In this work, the optimized growth temperature and HMDS flow rate were $1,100^{\circ}C$ and 8sccm, respectively. A Schottky diode with a Au, Al/poly 3C-SiC/$SiO_2$/Si(n-type) structure was fabricated and its threshold voltage ($V_d$), breakdown voltage, thickness of depletion layer, and doping concentration ($N_D$) values were measured as 0.84V, over 140V, 61nm, and $2.7{\times}10^{19}cm^2$, respectively. To produce good ohmic contact, Al/3C-SiC were annealed at 300, 400, and $500^{\circ}C$ for 30min under a vacuum of $5.0{\times}10^{-6}$Torr. The obtained p-n junction diode fabricated by poly 3C-SiC had similar characteristics to a single 3C-SiC p-n junction diode.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
• /
• 2001.11a
• /
• pp.267-271
• /
• 2001

다이오드의 소신호 및 대신호 파라미터 추출은 DC 해석, 외부 기생 소자 추출, 마지막으로 5-파라미터에 의한 내부소자 추출로 이루어진다. DC IV-곡선과 S-파라미터의 curve-fitting으로 내부 파라미터를 구하였고 외부 기생소자는 바이어스에 따라 변하지 성질을 이용하였다. 사용된 소자는 Schottky diode는 SIEMENS사의 BAS125를, Varactor diode는 SONY사의 1t362를, PIN diode는 Hitachi사의 HVM14S를 모델로 사용하였다. 실측을 위해 사용된 소자는 각각 HP사의 HSMS-2822, SONY사의 1t362, HP사의 HSMP-3834을 이용하여 측정하였다.

• Proceedings of the KIEE Conference
• /
• 2000.11c
• /
• pp.440-442
• /
• 2000

We have successfully fabricated SiC Schottky diodes using Al, Ni, Ti metallization systems. Schottky barrier height and other parameter have been measured by using I-V and C-V technique. The measured barreir heights depend on the metal and measurement techniques used. The barrier heights were 1.85eV(Al), 1.63eV(Ni), 0.97eV(Ti). The Ideality factors were 1.16(Al), 1.07(Ni), 1.05(Ti). Thermal stress tests were performed.

• Proceedings of the KIEE Conference
• /
• 1996.07a
• /
• pp.395-399
• /
• 1996

The Clamp Mode(CM) Forward Zero Voltage Switching Multi Resonant Converter(ZVS-MRC) with self-driven synchronous rectifier in studied. The loss at the synchronous rectification stage of the converter is analyzed using MOSFET linear model and is compared with the loss at the conventional schottky diode rectification stage of the converter. From the results of the analysis, it is known that the use of MOSFETs as a synchronous rectifier reduces the loss at the rectification stage over the whole load range comparing the use of schottky diodes as a conventional rectifier in the converter. In order to verify the validity of the analysis, we have built a 33W(3.3V/10A) CM Forward ZVS-MRC with self-driven synchronous rectifier, in which switching frequency is 1MHz, and tested. From the experimental results, it is known that the synchronous rectification achieved about 1W improvement in the loss at the rectification stage and about 3% in the efficiency at the converter as compared with the conventional schottky diode rectification.