• Journal of the Korea Society of Computer and Information
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• v.19 no.10
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• pp.197-205
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• 2014

This study set out to develop a logistics rationalization model to reduce logistics costs including return route costs by using open information systems that overcame the limitations of the old closed logistics systems by the corporations and applying the principle of freight car sharing among them. In recent years, information infrastructure that can be easily shared by many such as information networks, however, One of the causes of rising logistics costs is high empty transfer rates on return routes after goods are transported from the distribution center of each company to consumption sites, It is propose to promote logistic efficiency and innovation. The study especially identified a logistics rationalization plan by examining and analyzing the stages of transportation on the circulation route of a distribution system from the distribution center of a corporation to consumption sites and the empty transfer rates and their current state.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.187-191
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• 2007

This paper describes a 3.3V 10 bit CMOS digital-to-analog converter with a divided architecture of a 7 MSB and a 3 LSB, which uses an optimal Thermal-to-Binary Decoding method with monotonicity, glitch energy. The output stage utilizes here implements a return-to-zero circuit to obtain the dynamic performance. Most of D/A converters in decoding circuit is complicated, occupies a large chip area. For these problems, this paper describes a D/A converter using an optimal Thermal-to-Binary Decoding method. the designed D/A converter using the CMOS n-well $0.35{\mu}m$ process0. The experimental data shows that the rise/fall time, settling time, and INL/DNL are 1.90ns/2.0ns, 12.79ns, and a less than ${\pm}2.5/{\pm}0.7$ LSB, respectively. The power dissipation of the D/A converter with a single power supply of 3.3V is about 250mW.

• Journal of the Korean Society of Marine Environment & Safety
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• v.12 no.1 s.24
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• pp.33-38
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• 2006

In marine salvage, extreme tide heights and tidal currents are necessary to anchor an accidental ship. In order to meet this requirement, a simple scheme was developed which yields the spatial informations on the extreme tide from the distribution of approximate highest astronomical tide heights using a relationship between extreme and highest astronomical tides at the standard port. This method is the inference method based on horizontally homogeneity of tide. This scheme was applied to estimate extreme tide heights and tidal currents in the Namhae (southern sea of Korea). The highest astronomical tide heights are computed by amplitude of four major constituents (M2, S2, K1, O1 tide). The estimated extreme tide heights are ranged from 70 to 260 cm for return period 50 years and from 80 to 270cm for return period 100 years, respectively. For return period 100 years, extreme tidal currents show value of 1.55 times as strong as those of normal state.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.4
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• pp.691-698
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• 2008

This paper describes a 3.3V 10 bit CMOS digital-to-analog converter with a divided architecture of a 7 MSB and a 3 LSB, which uses an optimal Thermal-to-Binary Decoding method with monotonicity, glitch energy. The output stage utilizes here implements a return-to-zero circuit to obtain the dynamic performance. Most of D/A converters in decoding circuit is complicated, occupies a large chip area. For these problems, this paper describes a D/A converter using an optimal Thermal-to-Binary Decoding method. the designed D/A converter using the CMOS n-well $0.35{\mu}m$ process0. The experimental data shows that the rise/fall time, settling time, and INL/DNL are 1.90ns/2.0ns, 12.79ns, and a less than ${\pm}2.5/{\pm}0.7\;LSB$, respectively. The power dissipation of the D/A converter with a single power supply of 3.3V is about 250mW.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.1876-1879
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• 2003

Due to the conventional half-bridge switch-mode converters for dc motor drive have been usually using unbalanced circuit topologies which generate common-mode currents through parasitic capacitors distributed between the ground and the dc motor frame such as the heat-sink of switching devices or the frame of the dc motor. This paper describes methods that cancel common-mode current generated in half-bridge switch-mode converters by using circuit balancing technique. The circuit balancing is to make the noise pickup or occurring in both conductor lines, signal and return pathes, is equal in amplitude and opposite in phase so that it will be canceled out in the ground plane. The common-mode current cancellation in the proposed converter is confirmed by experimental results.

• Proceedings of the KIEE Conference
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• 2007.10c
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• pp.217-219
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• 2007

With the wide spread of direct current(DC) electric railroads in Korea, the stray current or leakage currents from negative return rails become a pending problem to the safety of nearby underground Infrastructures. The most widely used mitigation method for this interference is the stray current drainage method, which connects the underground metallic structures to the rails with diodes (polarized drainage) or thyristor (forced drainage). This method, however, inherently possesses some drawbacks such as an increase of total leakage torrents from rails, expansion of interference zone, etc. In order to resolve these drawbacks, we developed a rapid potential-controled rectifier and applied to a depot area where stray current inference is very severe. The effect of this method was analyzed from the field tell data and we suggest this method can be an excellent alternative to the drainage-bond-based mitigation methods.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.3
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• pp.485-490
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• 2012

Nowadays, in metropolitan railroad, DC feeding system is being generally applied. In order to reduce damage of electro-chemical corrosion caused by stray current and leakage current, in DC feeding system, rail is used as negative-polarity return conductor for traction load current. However, it has problem of rail potential increase and there are no adequate measures to prevent it in domestic. The rise of rail potential leads to damage for human and equipments. To solve the problems, this paper presents fundamental theory and related standards about rail potential increase. And then, we analyzed field testing data and simulated a variety of operations by using PSCAD/EMTDC as an analysis program of power system. In addition, this paper suggests rail potential limit device and addresses how to the device. To verify the effect, simulation of DC feeding system before and after the application of the device is carried out in various cases.

• Journal of the Korean Society of Safety
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• v.21 no.6 s.78
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• pp.26-32
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• 2006

The paper considers the electrical shock risk of the human body due to underwater leakage current in electric field. The characteristics of electric shock in fresh water due to the leakage of submerged electric facility in the bathtub in public baths were conducted. The exposed live electrode is modeled as a point source of electric current source. It is assumed that divergent monopole field exists in the vicinity of the current source, regardless of the presence of return electrode and insulating boundary. The electric potentials in the steel bathtub, Diesen and Mole and Flux3D program one are measured according to the distance from leakage source. The results show that the increased shock risk and safe distance are estimated by the bathtub of limited width and the voltage calculated on the basis of a divergent monopole field concept is compared with the measured value.

• Journal of Advanced Marine Engineering and Technology
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• v.30 no.8
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• pp.901-906
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• 2006

In this paper, the power amplifier using active bias circuits for LDMOS(Lateral Diffused Metal Oxide Semiconductor) MRF-21180 is designed and fabricated. According to change the temperature, the gate voltage of LDMOS is controlled by the fabricated active bias circuits which is made of PNP transistor to suppress drain current. The driving amplifier using MRF-21125 and MRF-21060 is made to drive the LDMOS MRF-21180 power amplifier. The variation of current consumption in the fabricated 60 watt power amplifier has an excellent characteristics of less than 0.1 A, whereas a passive biasing circuit dissipates more than 0.5 A. The implemented power amplifier has the gain over 9 dB, the gain flatness of less than $\pm$0.1 dB and input and output return loss of less than -6 dB over the frequency range 2.11 $\sim$ 2.17 GHz. The DC operation point of this power amplifier at temperature variation 0 $^{\circ}C$ to 60 $^{\circ}C$ is fixed by active bias circuit.

• Proceedings of the KIEE Conference
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• 1998.07a
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• pp.302-304
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• 1998

Self magnetic field in a Bus bar usually degrades the critical current in it. Actually the total critical current of a Bus bar is not the same as the sum of total critical current of each stacked HTS tape. This is due to the self field effects in a bus bar. To reduce the degradations of critical current in a bus bar, we need to analyze the self field distributions in a bus bar. Conceptually, by rearranging the each stacked tapes, the self field effects can be minimized. In this paper, we calculate the self magnetic field distributions across a bus bar analytically, with the variations of the relative angle of the two conductors in a go-and-return pair. As a result, we suggest that the optimum relative angle exist which minimize the self field effect in a bus bar.