• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.25 no.3A
• /
• pp.435-442
• /
• 2000

In this paper, we analyzed RF-DC conversion efficiency for the dual -polarization rectenna and the antenna position changing. Dual-Polarization rectenna consist of a two major parts, receiving antenna and rectifying circuits. We made dual-polarization 2.45GHz rectenna using the two dipole antennas and patch antenna. Rectifying circuit is consisted by a Schottky-Barrier diode with a large forward current and reverse breakdown voltage. The results of RF-DC conversion efficiency for the each of designed dual-polarization rectenna has 69.1% with 360$\Omega$(dipole type) and 75.4% with 340$\Omega$(patch type ) optimum load resistor. When the each of dual-polarization rectenna has optimal load resistor, it's conversion efficiency shows of $\pm$20% in dipole type and $\pm$5 in patch type at 0~180。position.

• Journal of the Korean Geotechnical Society
• /
• v.33 no.11
• /
• pp.35-43
• /
• 2017

In this study, the pull-out resistance behavior of the anchor with the bump type resistors at the anchor body was experimentally investigated. In the model tests, the pull-out resistance was measured by pulling out the anchor at a constant speed. Anchor body was installed in the center of the circular sand tank. Pull-out tests were conducted for 10 conditions. The anchor type (existence of the resistor), the friction conditions of the anchor body surface ($1/3{\phi}$, $2/3{\phi}$, ${\phi}$), the bump type resistor set number (1set, 2set, 4set), and the height of resistors (0.05d, 0.10d, 0.20d) were varied. The load-displacement relationship for each conditions was measured during the pull-out tests at a constant speed (1 mm/min). Maximum pull-out length was 80 mm. As a result, the pull-out behavior of the friction type anchor and the expansion type anchor was different. As the number of resistor increased, the maximum pull-out resistance increased and the residual pull-out resistance ratio increased significantly, which were at 171~591 percent larger than that of the friction type anchor.

• Proceedings of the KIEE Conference
• /
• 2000.07d
• /
• pp.2404-2406
• /
• 2000

Chua's circuit is a simple electronic network which exhibits a variety of bifurcation and attractors. The circuit consists of two capacitors, an inductor, a linear resistor, and a nonlinear resistor. In this paper, a transmitter and a receiver using two identical Chua's circuits are proposed and synchronizations of a T or ${\pi}$ type power line are investigated. Since the synchronization of the power line system is impossible by coupled synchronization, theory having both the drive-response and the coupled synchronization is proposed. As a result, the chaos synchronization has delay characteristics in the power line transmission system caused by the line parameters L and C

• Journal of Power Electronics
• /
• v.18 no.5
• /
• pp.1555-1566
• /
• 2018

Proportional capacitor-current-feedback active damping (AD) is a common damping method for the resonance of LCL-type grid-connected inverters. Proportional capacitor-current-feedback AD behaves as a virtual resistor in parallel with the capacitor. However, the existence of delay in the actual control system causes impedance in the virtual resistor. Impedance is manifested as negative resistance when the resonance frequency exceeds one-sixth of the sampling frequency ($f_s/6$). As a result, the damping effect disappears. To extend the system damping region, this study proposes a virtual resistor-inductor-capacitor (RLC) AD method. The method is implemented by feeding the filter capacitor current passing through a band-pass filter, which functions as a virtual RLC in parallel with the filter capacitor to achieve positive resistance in a wide resonance frequency range. A combination of Nyquist theory and system close-loop pole-zero diagrams is used for damping parameter design to obtain optimal damping parameters. An experiment is performed with a 10 kW grid-connected inverter. The effectiveness of the proposed AD method and the system's robustness against grid impedance variation are demonstrated.

• Journal of Sensor Science and Technology
• /
• v.25 no.5
• /
• pp.349-353
• /
• 2016

Recently, research on bolometer-type uncooled infrared image sensor which is made for industrial applications has been increasing. In general, it is difficult to calibrate fixed pattern noise (FPN) of bolometer array. In this paper, average-current calibration algorithm is presented for reducing bolometer resistance offset. A resistor which is produced by standard CMOS process, on the average, has a deviation. We compensate for deviation of each resistor using average-current calibration algorithm. The proposed algorithm has been implemented by a chip which is consisted of a bolometer pixel array, average current generators, current-to-voltage converters (IVCs), a digital-to-analog converter (DAC), and analog-to-digital converters (ADCs). These bolometer-resistor array and readout circuit were designed and manufactured by $0.35{\mu}m$ standard CMOS process.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.25 no.3
• /
• pp.307-314
• /
• 1988

The thin, square-diaphragm silicon pressure sensor utilizing shear piezoresistance effect was designed and fabricated and its characteristics were examined. The sensor has only one diffused resistor, whereas conventional full-bridge sensor has four. Sensitivity is somewhat lower but temperature compensation is easier than the latter. The proposed sensor was fabricated with only one p-type diffused resistor of the dimension of 113x85\ulcorner\ulcornerlocated near the center of the edge of the diaphragm. The resistor was at 45\ulcornerwith the edge of the diaphragm. The sensitivity of the sensor was 36\ulcorner/V\ulcornermHg and was linear in the pressure range from 0 to 300 mmHg. The temperature coefficient without temperature compensation was 55 ppm/\ulcorner and it was decreased to about 0.17 mmHg/\ulcorner with compensation in the range from 10 to 60\ulcorner.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.7 no.1
• /
• pp.30-36
• /
• 1993

A simple discontinuous conduction mode(DCM) flyback type active power factor corrector for low power supply resents an effective resistive load to its power input. It is therefore well suited as an inexpensive high power factor rectifier for office equipment. An equivalent circuit model for the Active Power Factor Corrector based on the "Loss Free Resistor" concept is presented. This simple model correctly describes the basic power processing properties of the Active Power Factor Corrector, including input port resistor emulation, output port power some characteristics.teristics.

• Journal of Industrial Technology
• /
• v.11
• /
• pp.43-53
• /
• 1991

Two kinds of simple active oscillators are proposed and analyzed assuming that operational amplifier has two-poles frequency characteristics. The first circuit is composed of one operational amplifier, one resistor and one grounded capacitor. The second oscillator is realized with one operational amplifier and three resitors. Proposed oscillators have the low sensitivity of the oscillation frequency for little variations of the passive element values. By the experimental results obtained with Op-Amp. ${\mu}A741$, the simple oscillators can be useful for the frequency range $1.25 KHz{\leq}f_{01}{\leq}40KHz$ for the active-RC type or $45.45 KHz{\leq}f_{02}{\leq}400KHz$ for the active-R oscillator, and it is shown to transform the active-R oscillator circuit into the voltage controlled type. Therefore, two kinds of oscillator circuit are attractive for the IC realization, because they have one operational amplifier, one resistor and one grounded capacitor, or three resistors.

• Journal of Multimedia Information System
• /
• v.5 no.2
• /
• pp.139-142
• /
• 2018

This work presents a novel architecture of phase locked loop (PLL) with the current compensating scheme to improve phase noise characteristic. The proposed PLL has two charge pumps (CP), main-CP (MCP) and sub-CP (SCP). The smaller SCP current with same time duration but opposite direction of UP/DN MCP current is injected to the loop filter (LF). It suppresses the voltage fluctuation of LF. The PLL has a novel voltage controlled oscillator (VCO) consisting of a voltage controlled resistor (VCR) and the three-stage ring oscillator with latch type delay cells. The VCR linearly converts voltage into current, and the latch type delay cell has short active on-time of transistors. As a result, it improves phase noise characteristic. The proposed PLL has been fabricated with $0.35{\mu}m$ 3.3 V CMOS process. Measured phase noise at 1 MHz offset is -103 dBc/Hz resulting in 3 dBc/Hz phase noise improvement compared to the conventional PLL.

• Journal of Advanced Marine Engineering and Technology
• /
• v.32 no.1
• /
• pp.147-152
• /
• 2008

This paper has been fabricated the two different type of variable attenuators using a characteristics of a 3 dB directional coupler and pin diodes. One was not analyzed using the conventional even-odd modes but used simple two-port techniques. The resulting scattering parameters described operation characteristics for the general case where the terminating impedances are equal and unequal. After analyzing resistor role of the ${\pi}$ type fixed attenuator. this paper used a pin diode instead of a resistor. The variable attenuators were fabricated using pin diodes for current-controlled attenuation on the coupled ports of a 3 dB branch-line coupler and ${\pi}$ type fixed attenuator. The realized variable attenuators have more than 33 dB attenuation ranges at 2.1 GHz. and the input and output reflection coefficients are less than -13 dB. These results could be applied to mobile communication systems. It can be varied gain of the power amplifier according to change a outdoor environmental temperature and improved linearity.